Patents by Inventor Dongxue YANG

Dongxue YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240164105
    Abstract: A memory, a controlling method thereof, a memory system and an electronic device are disclosed. The memory can include a semiconductor layer and a memory array disposed on the semiconductor layer. The memory array can include a plurality of memory strings connected with the same bit line. Each memory string can include a memory cell and a select cell connected on at least one side of the memory cell. The select cell can include a first kind of transistors with a first threshold voltage and a second kind of transistors with a second threshold voltage. The first kind of transistors can be connected with the second kind of transistors. The first threshold voltage can be different from the second threshold voltage. Different memory strings can be controlled to be on or off to realize selective controlling functions for a plurality of memory strings connected with the same bit line.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 16, 2024
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Tao YANG, Dongxue ZHAO, Wenxi ZHOU, Zhiliang XIA
  • Publication number: 20240164107
    Abstract: The present disclosure provides a memory device that includes a film stack having functional tiers stacked in a first direction. Each functional tier includes a first dielectric layer and a conductive layer. The memory device also includes channel structures disposed in an array core region, wherein each channel structure extends through the film stack in the first direction. Each channel structure includes a control gate in a center, a memory film that is disposed on a sidewall of the control gate and includes a ferroelectric film. Each channel structure also includes a channel layer disposed on a sidewall of the memory film.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 16, 2024
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: DongXue ZHAO, Tao YANG, Wenxi ZHOU, Yuancheng YANG, ZhiLiang XIA, ZongLiang HUO
  • Publication number: 20240151757
    Abstract: A method for achieving terminal-pair definition of four-terminal-pair (4TP) impedance and an application thereof are provided, which belongs to the field of precision measurement and metrology. A current output terminal of a two-stage follower is connected to a high current terminal of impedance through a coaxial line, and a voltage output terminal of the two-stage follower is connected to a high voltage terminal of the impedance through the coaxial line, which makes current of the high voltage terminal be 0, and core wire currents and outer wire currents of the high current terminal equal and reverse. The terminal-pair definition of the 4TP impedance can be satisfied; and the follower is added to make a bridge ratio variable and isolate effects of bridge load changes, thereby accelerating a balancing speed of the 4TP impedance bridge, and achieving accurate and fast comparative measurement having high precision of the 4TP AC impedance.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 9, 2024
    Inventors: Yan YANG, Lu Huang, Dongxue Dai, Wei WANG, Xia LIU
  • Patent number: 11965420
    Abstract: Disclosed are a shield tunnel segment structure and a construction method thereof. The shield tunnel segment structure includes segment blocks sequentially spliced in a circumferential direction. Each segment block forms a closed annular segment structure, and outer diameters of adjacent annular segment structures gradually increase in an axial direction. At least two adjacent segment blocks of the same annular segment structure form an annular inner groove, and at least one segment block of the adjacent annular segment structures is provided with an inner bump which matches the annular inner groove. At least two adjacent segment blocks of the same annular segment structure form an annular outer groove, and at least one segment block of the adjacent annular segment structures is provided with an outer bump which matches the annular outer groove. The annular outer grooves and the annular inner grooves are staggered in the circumferential direction.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: April 23, 2024
    Assignees: Shandong University, Northeast Electric Power University
    Inventors: Ke Wu, Tao Yang, Yang Zheng, Guodong Li, Zhihao Xing, Hongna Yang, Jiaxiang Xu, Rong Chen, Dongxue Hao, Jizheng Sun, Jingchuan Duan, Hongwei Zhang
  • Patent number: 11965920
    Abstract: A method for achieving terminal-pair definition of four-terminal-pair (4TP) impedance and an application thereof are provided, which belongs to the field of precision measurement and metrology. A current output terminal of a two-stage follower is connected to a high current terminal of impedance through a coaxial line, and a voltage output terminal of the two-stage follower is connected to a high voltage terminal of the impedance through the coaxial line, which makes current of the high voltage terminal be 0, and core wire currents and outer wire currents of the high current terminal equal and reverse. The terminal-pair definition of the 4TP impedance can be satisfied; and the follower is added to make a bridge ratio variable and isolate effects of bridge load changes, thereby accelerating a balancing speed of the 4TP impedance bridge, and achieving accurate and fast comparative measurement having high precision of the 4TP AC impedance.
    Type: Grant
    Filed: November 6, 2023
    Date of Patent: April 23, 2024
    Assignee: NATIONAL INSTITUTE OF METROLOGY, CHINA
    Inventors: Yan Yang, Lu Huang, Dongxue Dai, Wei Wang, Xia Liu
  • Publication number: 20240105266
    Abstract: A method for data erasing of a non-volatile memory device is disclosed. The memory includes multiple memory cell strings each including a select gate transistor and multiple memory cells that are connected in series. The method comprises applying a step erase voltage to one memory cell string for an erase operation, the step erase voltage having a step-rising shaped voltage waveform. The method further comprises, during a period when the step erase voltage rises from an intermediate level to a peak level, raising a voltage of the select gate transistor from a starting level to a peak level, and raising a voltage of a predetermined region from a starting level to a peak level, such that a gate-induced drain leakage current is generated in the one memory cell string. The predetermined region is adjacent to the at least one select gate transistor and includes at least one memory cell.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Tao YANG, Dongxue ZHAO, Lei LIU, Kun ZHANG, Wenxi ZHOU, Zhiliang XIA, Zongliang HUO
  • Publication number: 20240052037
    Abstract: The present invention provides an anti-PD-L1/anti-CD47 bispecific antibody and a preparation method therefor. The antibody has characteristics of a natural IgG, and is a highly stable heterodimeric form without heavy and light chain mismatching. The bispecific antibody can bind two target molecules at the same time and has a smaller side effect.
    Type: Application
    Filed: January 7, 2022
    Publication date: February 15, 2024
    Inventors: Jiawang LIU, Yaping YANG, Siqi ZHAO, Yang LIU, Nanmeng SONG, Hongjuan ZHANG, Dongxue YANG, Lanxin ZHANG, Jing WANG, Jiangcheng XU, Kyoung Woo LEE
  • Publication number: 20240002464
    Abstract: The present invention provides a T cell receptor (TCR) capable of specifically binding to HPV 16 E6 antigen short peptide complex TIHDIILECV-HLA A0201. Moreover, an effector cell transducing the TCR of the present disclosure also has a strong killing function. Such TCR can be used separately or in combination with other therapeutic agents, and can also be used in adoptive cellular immunotherapy to target a tumor cell presenting the complex TIHDIILECV-HLA A0201.
    Type: Application
    Filed: November 23, 2021
    Publication date: January 4, 2024
    Inventors: Yi LI, Dongxue YANG, Shaopei CHEN, Hanli SUN