Abstract: A power amplifier has capacitive gain networks, a reference-generating circuit, a differential amplifier and a comparator. A first capacitive gain network may be configured to sample a voltage at a node, the voltage at the node being representative of current flowing through a transistor in a power stage of the power amplifier. The reference-generating circuit includes a replica transistor that is a scaled version of the transistor in the power stage. The replica transistor is configured to control a reference voltage output by the reference-generating circuit. A second capacitive gain network is configured to sample the reference voltage. The differential amplifier is configured to amplify samples of the reference voltage and the voltage at the node. The comparator may be configured to configured provide an output indicative of a difference between an amplified sample of the reference voltage and an amplified sample of the voltage at the node.

Abstract: A power amplifier has a reference-generating circuit, sampling subcircuits, a differential amplifier and a comparator. The reference-generating circuit may include replica transistors that are scaled versions of transistors in a power stage of the power amplifier. In one example, a first replica transistor is configured to control a first reference voltage output by the reference-generating circuit and a second replica transistor is configured to control a second reference voltage output by the reference-generating circuit. A first sampling subcircuit may include capacitive gain networks configured to sample the first reference voltage and a voltage at a node. The voltage at the node may represent current flowing through a first transistor in the power stage of the power amplifier. A second sampling subcircuit may include capacitive gain networks configured to sample the second reference voltage and the voltage at the node.

Abstract: An ESD trigger circuit is provided for protecting a pass transistor coupled to an integrated circuit terminal. The integrated circuit terminal couples through a diode to a voltage node. In response to an electrostatic shock at the integrated circuit terminal, the diode conducts charge to the voltage node to pulse a voltage of the voltage node. The ESD trigger circuit responds to the pulse of the voltage by coupling the voltage node to a gate of the pass transistor.

Abstract: An audio driver including: a first common mode voltage circuit configured to generate a first common mode voltage based on a selected one of a first supply voltage or a second supply voltage, wherein the first supply voltage is greater than the second supply voltage, wherein the first common mode voltage exhibits a voltage change in response to switching between the first supply voltage and the second supply voltage; a first integrator configured to integrate a first difference between a first integrator input signal and the first common mode voltage to generate a first integrator output signal, wherein an audio signal is based on the first integrator output signal, wherein the first integrator output signal exhibits a first artifact in response to the voltage change in the first common mode voltage; and an artifact reduction circuit configured to reduce an effect on the audio signal due to the first artifact.

Abstract: The disclosure pertains to an audio signal processing system that offers low latency without sacrificing various desirable features such as large dynamic operating range and low power consumption. Low latency is achieved by generating a feed-forward signal that is based in part on performing high-pass filtering and threshold crossing detection upon an amplified transducer signal. The feed-forward signal is provided to a controller, which uses the feed-forward signal to produce a feedback signal that controls one or more operating parameters of one or more components of the audio signal processing system. The feedback signal produced in this manner avoids incurring a delay associated with propagating the amplified transducer signal to the controller via an analog-to-digital converter (ADC) for purposes of generating the feedback signal. Generation, and use, of the feed-forward signal also allows the audio amplifier to rapidly adjust to amplitude changes in audio signals received from the transducer.

Abstract: An integrated circuit is provided with a terminal that functions to pass a data signal during a high-speed data mode of operation and to pass an audio signal during an audio mode of operation. The integrated circuit includes an audio source that couples to the terminal through an audio pass transistor during the audio mode of operation. To maintain the audio pass transistor off during the high-speed data mode of operation, the integrated circuit includes a first transistor coupled between the terminal and a gate of the audio pass transistor. The first transistor conducts negative charge from the terminal to the gate of the audio pass transistor.

Abstract: In one implementation, an apparatus, such as an ESD protection circuit, is disclosed. The apparatus can include a filter coupled between a local supply voltage rail to a supply voltage rail. A switch circuit can be connected in parallel with the filter. The apparatus can include a clamp configured to 1) provide a first ESD shunt path from an input line to the local supply voltage rail and 2) provide a second ESD shunt path from the input line to a lower voltage rail. A second clamp can be configured to provide a third ESD shunt path from the local supply voltage rail to the lower voltage rail. The switch circuit can be configured to close a switch to bypass the filter.

Abstract: The disclosure pertains to an audio signal processing system that offers low latency without sacrificing various desirable features such as large dynamic operating range and low power consumption. Low latency is achieved by generating a feed-forward signal that is based in part on performing high-pass filtering and threshold crossing detection upon an amplified transducer signal. The feed-forward signal is provided to a controller, which uses the feed-forward signal to produce a feedback signal that controls one or more operating parameters of one or more components of the audio signal processing system. The feedback signal produced in this manner avoids incurring a delay associated with propagating the amplified transducer signal to the controller via an analog-to-digital converter (ADC) for purposes of generating the feedback signal. Generation, and use, of the feed-forward signal also allows the audio amplifier to rapidly adjust to amplitude changes in audio signals received from the transducer.

Abstract: An example of an apparatus includes a transimpedance amplifier (TIA) and an integrator circuit that includes an operational amplifier, a capacitor coupled between the operational amplifier's inverting input and output, a first FET coupled between the inverting input of the op amp and the output of the TIA, a resistive element connected to a lower supply rail, and a second FET coupled between the inverting input of the TIA and the resistive element and having a second gate connected to the output of the operational amp.

Abstract: In one implementation, an apparatus, such as an ESD protection circuit, is disclosed. The apparatus can include a filter coupled between a local supply voltage rail to a supply voltage rail. A switch circuit can be connected in parallel with the filter. The apparatus can include a clamp configured to 1) provide a first ESD shunt path from an input line to the local supply voltage rail and 2) provide a second ESD shunt path from the input line to a lower voltage rail. A second clamp can be configured to provide a third ESD shunt path from the local supply voltage rail to the lower voltage rail. The switch circuit can be configured to close a switch to bypass the filter.

Abstract: A transmission line includes an equalization circuit. The equalization circuit is a second-order equalization circuit having a first loop at a gain element and a second loop at the gain element. The first loop may include a first compensation capacitor, and the second loop may include a second compensation capacitor and a resistor. The second order equalization circuit may allow for improved performance with respect to gain as well as reduced power usage.

Abstract: A microwave passive sensor includes a microwave receiver, a low noise amplifier coupled to the microwave receiver, a mixer coupled to the low noise amplifier, and a baseband amplifier coupled to the mixer.

Abstract: Certain aspects of the present disclosure generally relate to electronic circuits and, more particularly, to power supply circuit. The power supply circuit may include at least one voltage supply selectively coupled to an output node of the power supply circuit, and a boost converter having: an inductive element coupled to a power source and a switching node; a first transistor coupled between the switching node and a reference potential node; a second transistor having a drain coupled to the switching node; and a third transistor having a source coupled to a source of the second transistor, a drain of the third transistor being coupled to the output node.

Abstract: An apparatus is disclosed for reducing resistor conductivity modulation during amplification. In an example aspect, the apparatus includes a power amplifier circuit comprising a first pair of resistors, a digital-to-analog converter comprising a second pair of resistors, a reference generation circuit comprising a third pair of resistors, and a scaling circuit. The scaling circuit is configured to accept a common-mode reference voltage and a common-mode output voltage. The scaling circuit is also configured to provide a first voltage at body terminals of the first pair of resistors, a second voltage at body terminals of the second pair of resistors, and a third voltage at body terminals of the third pair of resistors such that a summation of the first voltage and the third voltage reduced by the second voltage is approximately equal to an average of the common-mode reference voltage and the common-mode output voltage.

Abstract: Aspects of the present disclosure relate to apparatus and methods for dynamically adjusting the common-mode input signal of a power amplifier, such as a class-D power amplifier. One example power amplifier circuit generally includes a first amplifier having a signal input and a power input; and a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.

Abstract: An integrated circuit is provided with a terminal that functions to pass a data signal during a high-speed data mode of operation and to pass an audio signal during an audio mode of operation. The integrated circuit includes an audio source that couples to the terminal through an audio pass transistor during the audio mode of operation. To maintain the audio pass transistor off during the high-speed data mode of operation, the integrated circuit includes a first transistor coupled between the terminal and a gate of the audio pass transistor. The first transistor conducts negative charge from the terminal to the gate of the audio pass transistor.

Abstract: An ESD trigger circuit is provided for protecting a pass transistor coupled to an integrated circuit terminal. The integrated circuit terminal couples through a diode to a voltage node. In response to an electrostatic shock at the integrated circuit terminal, the diode conducts charge to the voltage node to pulse a voltage of the voltage node. The ESD trigger circuit responds to the pulse of the voltage by coupling the voltage node to a gate of the pass transistor.

Abstract: A transmission line includes an equalization circuit. The equalization circuit is a second-order equalization circuit having a first loop at a gain element and a second loop at the gain element. The first loop may include a first compensation capacitor, and the second loop may include a second compensation capacitor and a resistor. The second order equalization circuit may allow for improved performance with respect to gain as well as reduced power usage.

Abstract: Aspects of the present disclosure relate to apparatus and methods for dynamically adjusting the common-mode input signal of a power amplifier, such as a class-D power amplifier. One example power amplifier circuit generally includes a first amplifier having a signal input and a power input; and a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.

Abstract: A class-D amplifier including a pulse width modulator including an input configured to receive a first signal based on an input signal, and an output configured to generate a pulse width modulated (PWM) signal; an H-bridge including an input coupled to an output of the pulse width modulator and an output coupled to a load, wherein the H-bridge is configured to generate an output signal across the load based on the PWM signal; and a deadtime compensation circuit coupled to the H-bridge, wherein the deadtime compensation circuit is configured to compensate for deadtime distortion in the output signal. The deadtime compensation circuit may be a feedback circuit between an output of the H-bridge and an input of the pulse width modulator, a pulse modification circuit at the output of the pulse width modulator, or an offset signal generating circuit providing an offset signal to the pulse width modulator.