Patents by Inventor Dong-Yoon Seo

Dong-Yoon Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10887980
    Abstract: A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: January 5, 2021
    Assignees: SAMSUNG ELECTRONICS CO., LTD., RESEARCH & BUSINESS FOUNDATION SUNKYUNKWAN UNIVERSITY
    Inventors: Dong-Yoon Seo, Jea-Eun Lee, WanSoo Nah
  • Publication number: 20200178386
    Abstract: A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.
    Type: Application
    Filed: February 11, 2020
    Publication date: June 4, 2020
    Applicants: Samsung Electronics Co., Ltd., RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Dong-Yoon SEO, Jea-Eun LEE, WanSoo NAH
  • Patent number: 10561013
    Abstract: A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: February 11, 2020
    Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Dong-Yoon Seo, Jea-Eun Lee, Wansoo Nah
  • Publication number: 20190191547
    Abstract: A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.
    Type: Application
    Filed: September 14, 2018
    Publication date: June 20, 2019
    Applicants: Samsung Electronics Co., Ltd., Research & Business Foundation SUNGKYUNKWAN UNIVERSITY
    Inventors: Dong-Yoon SEO, Jea-Eun LEE, Wansoo NAH
  • Patent number: 9754658
    Abstract: A memory module includes a first printed circuit board (PCB) which includes a first surface, a second surface, first taps formed on the first surface, and second taps formed on the second surface, a first buffer attached to the first PCB, and first memory devices attached to the first PCB, in which the first buffer is configured to transmit signals input through the first taps and the second taps to the first memory devices, and signals re-driven by the first buffer among the signals are transmitted to a second module through the second taps.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: September 5, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do Hyung Kim, In Young Park, Dong Yoon Seo, Jong Hyun Seok, Young Ho Lee, Dong Min Jang
  • Publication number: 20160247552
    Abstract: A memory module includes a first printed circuit board (PCB) which includes a first surface, a second surface, first taps formed on the first surface, and second taps formed on the second surface, a first buffer attached to the first PCB, and first memory devices attached to the first PCB, in which the first buffer is configured to transmit signals input through the first taps and the second taps to the first memory devices, and signals re-driven by the first buffer among the signals are transmitted to a second module through the second taps.
    Type: Application
    Filed: January 19, 2016
    Publication date: August 25, 2016
    Inventors: Do Hyung KIM, In Young PARK, Dong Yoon SEO, Jong Hyun SEOK, Young Ho LEE, Dong Min JANG
  • Patent number: 8369099
    Abstract: Disclosed is an electronic device module including a module substrate having first and second electronic device pair portions. The first electronic device pair portion may include a first and a second contact pad area and a first via area between the first and second contact pad areas. The first electronic device pair portion may also include a first layer and a second layer. The first layer may include a plurality of first lines connecting a plurality of contact pads in the first contact pad area on one side of the module substrate to a plurality of vias. The second layer may include a plurality of second lines connecting a plurality of contact pads in the second contact pad area to a plurality of vias in the via area. The second layer may also include a plurality of third lines connecting the first and second electronic device pair portions.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: February 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do Hyung Kim, Jung-Mo Yang, Hyun Jung Yoo, Dong-Yoon Seo, In-Young Park
  • Publication number: 20100195300
    Abstract: Disclosed is an electronic device module including a module substrate having first and second electronic device pair portions. The first electronic device pair portion may include a first and a second contact pad area and a first via area between the first and second contact pad areas. The first electronic device pair portion may also include a first layer and a second layer. The first layer may include a plurality of first lines connecting a plurality of contact pads in the first contact pad area on one side of the module substrate to a plurality of vias. The second layer may include a plurality of second lines connecting a plurality of contact pads in the second contact pad area to a plurality of vias in the via area. The second layer may also include a plurality of third lines connecting the first and second electronic device pair portions.
    Type: Application
    Filed: January 29, 2010
    Publication date: August 5, 2010
    Inventors: Do Hyung Kim, Jung-Mo Yang, Hyun Jung Yoo, Dong-Yoon Seo, In-Young Park
  • Publication number: 20100078211
    Abstract: Provided is a module having a symmetric topology. The module may include a pair of diverging via bodies configured to receive complementary signals. The pair of diverging via bodies may be further configured to diverge the complementary signals in at least three pairs of diverged complementary signals. The module may further include at least three pairs of connecting via bodies configured to receive the at least three pairs of diverged complementary signals from the pair of diverging via bodies and configured to transmit the at least three pairs of diverged complementary signals to components.
    Type: Application
    Filed: August 25, 2009
    Publication date: April 1, 2010
    Inventors: Dohyung Kim, Jung-Mo Yang, Hyunjung Yoo, Dong-Yoon Seo