Abstract: The present disclosure relates to an electroluminescence display device including a display panel including a pixel driving circuit and a light emitting element, a power supply circuit for generating a logic voltage to be applied to the pixel driving circuit, and a timing controller for supplying a voltage control signal to the power supply circuit. The power supply circuit may include a power IC, a booster circuit, and a voltage regulator. In the electroluminescence display device, degradation noise of the pixel can be reduced, and thereby, the image quality of the display panel can be improved.

Abstract: The present disclosure relates to an electroluminescence display device including a display panel including a pixel driving circuit and a light emitting element, a power supply circuit for generating a logic voltage to be applied to the pixel driving circuit, and a timing controller for supplying a voltage control signal to the power supply circuit. The power supply circuit may include a power IC, a booster circuit, and a voltage regulator. In the electroluminescence display device, degradation noise of the pixel can be reduced, and thereby, the image quality of the display panel can be improved.

Abstract: A display device and a method of driving the same are disclosed. The display device includes a first driver integrated circuit configured to drive a first pixel array, a second driver integrated circuit configured to drive a second pixel array, a power module integrated circuit configured to receive an enable signal and output a driving voltage, and an AND gate configured to receive an output of the first driver integrated circuit and an output of the second driver integrated circuit and output the enable signal. The driving voltage output from the power module integrated circuit is commonly supplied to the first and second driver integrated circuits.

Abstract: A display device and a method of driving the same are disclosed. The display device includes a first driver integrated circuit configured to drive a first pixel array, a second driver integrated circuit configured to drive a second pixel array, a power module integrated circuit configured to receive an enable signal and output a driving voltage, and an AND gate configured to receive an output of the first driver integrated circuit and an output of the second driver integrated circuit and output the enable signal. The driving voltage output from the power module integrated circuit is commonly supplied to the first and second driver integrated circuits.