Abstract: A logic card for interconnection of integrated circuits comprises a laminate for supporting integrated circuit devices. The laminate includes a relatively highly conductive layer. A selected plurality of holes are formed through the laminate in selected patterns at each of a plurality of stations on the laminate. A conductor is disposed in each of the holes. The conductors comprise, in each pattern, first and second groups of conductors. The conductors in each first group have one end effectively exposed on one side of the laminate and the conductors in each second group in each pattern have their opposite ends effectively exposed on opposite sides of the laminate, thus adapting the conductors for connection thereto of either or both of a lead from an integrated circuit and a conductor wire.