Patents by Inventor Donna K. Johnson
Donna K. Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7696586Abstract: A structure. The structure may include a layer of cobalt disilicide that is substantially free of cobalt monosilicide and there is substantially no stringer of an oxide of titanium on the layer of cobalt disilicide. The structure may include a substrate that includes: an insulated-gate field effect transistor (FET) that includes a source, a drain, and a gate; a first layer of cobalt disilicide on the source, said first layer having substantially no cobalt monosilicide, and said first layer having substantially no stringer of an oxide of titanium thereon; a second layer of cobalt disilicide on the drain, said second layer having substantially no cobalt monosilicide having substantially no stringer of an oxide of titanium thereon; and a third layer of cobalt disilicide on the gate, said third layer having substantially no cobalt monosilicide and having substantially no stringer of an oxide of titanium thereon.Type: GrantFiled: July 18, 2008Date of Patent: April 13, 2010Assignee: International Business Machines CorporationInventors: David Paul Agnello, Mary Conroy Bushey, Donna K. Johnson, Jerome Brett Lasky, Peter James Lindgren, Kirk David Peterson
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Publication number: 20080296706Abstract: A structure. The structure may include a layer of cobalt disilicide that is substantially free of cobalt monosilicide and there is substantially no stringer of an oxide of titanium on the layer of cobalt disilicide. The structure may include a substrate that includes: an insulated-gate field effect transistor (FET) that includes a source, a drain, and a gate; a first layer of cobalt disilicide on the source, said first layer having substantially no cobalt monosilicide, and said first layer having substantially no stringer of an oxide of titanium thereon; a second layer of cobalt disilicide on the drain, said second layer having substantially no cobalt monosilicide having substantially no stringer of an oxide of titanium thereon; and a third layer of cobalt disilicide on the gate, said third layer having substantially no cobalt monosilicide and having substantially no stringer of an oxide of titanium thereon.Type: ApplicationFiled: July 18, 2008Publication date: December 4, 2008Inventors: David Paul Agnello, Mary Conroy Bushey, Donna K. Johnson, Jerome Brett Lasky, Peter James Lindgren, Kirk David Peterson
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Patent number: 7411258Abstract: A structure relating to removal of an oxide of titanium generated as a byproduct of a process that forms cobalt disilicide within an insulated-gate field effect transistor (FET). The structure may comprise a layer of cobalt disilicide that is substantially free of cobalt monosilicide, with substantially no stringer of an oxide of titanium on the layer of cobalt disilicide. The structure may alternatively comprise a layer of cobalt disilicide, a patch of an oxide of titanium, and a reagent in contact with the patch at a temperature and for a period of time. The layer is substantially free of cobalt monosilicide. The patch is on the layer of cobalt disilicide. The reagent is adapted to remove the patch within the period of time. The reagent does not chemically react with the layer of cobalt disilicide, and the reagent comprises water, ammonium hydroxide, and hydrogen peroxide.Type: GrantFiled: August 27, 2001Date of Patent: August 12, 2008Assignee: International Business Machines CorporationInventors: David Paul Agnello, Mary Conroy Bushey, Donna K. Johnson, Jerome Brett Lasky, Peter James Lindgren, Kirk David Peterson
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Patent number: 7381276Abstract: An apparatus for holding a semiconductor substrate comprises a plate having a pocket which holds the substrate, wherein the pocket comprises a lower surface and an inner edge. The inner edge comprises a plurality of members extending radially inward to reduce the area of contact between the inner edge and the substrate. The beveled edge is inclined so that there is an acute angle between the lower surface of the pocket and the beveled edge.Type: GrantFiled: July 16, 2002Date of Patent: June 3, 2008Assignee: International Business Machines CorporationInventors: Donna K. Johnson, Jim S. Nakos, Jean-Jacques H. Psaute, Bernard A. Roque, Jr.
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Patent number: 6853032Abstract: A process of forming a nitride film on a semiconductor substrate including exposing a surface of the substrate to a rapid thermal process to form the nitride film.Type: GrantFiled: December 8, 2003Date of Patent: February 8, 2005Assignee: International Business Machines CorporationInventors: Arne W. Ballantine, Donna K. Johnson, Glen L. Miles
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Publication number: 20040135214Abstract: A process of forming a nitride film on a semiconductor substrate including exposing a surface of the substrate to a rapid thermal process to form the nitride film.Type: ApplicationFiled: December 8, 2003Publication date: July 15, 2004Applicant: International Business Machines CorporationInventors: Arne W. Ballantine, Donna K. Johnson, Glen L. Miles
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Publication number: 20040011293Abstract: An apparatus for holding a semiconductor substrate comprises a plate having a pocket which holds the substrate, wherein the pocket comprises a lower surface and an inner edge. The inner edge comprises a plurality of members extending radially inward to reduce the area of contact between the inner edge and the substrate. The beveled edge is inclined so that there is an acute angle between the lower surface of the pocket and the beveled edge.Type: ApplicationFiled: July 16, 2002Publication date: January 22, 2004Applicant: International Business Machines CorporationInventors: Donna K. Johnson, Jim S. Nakos, Jean-Jacques H. Psaute, Bernard A. Roque
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Patent number: 6660664Abstract: A process of forming a nitride film on a semiconductor substrate including exposing a surface of the substrate to a rapid thermal process to form the nitride film.Type: GrantFiled: March 31, 2000Date of Patent: December 9, 2003Assignee: International Business Machines Corp.Inventors: James W. Adkisson, Arne W. Ballantine, Matthew D. Gallagher, Peter J. Geiss, Jeffrey D. Gilbert, Shwu-Jen Jeng, Donna K. Johnson, Robb A. Johnson, Glen L. Miles, Kirk D. Peterson, James J. Toomey, Tina Wagner
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Patent number: 6638629Abstract: A method and structure for fabricating a semiconductor wafer that may be used to monitor the temperature distribution across a wafer surface. A substrate that includes a semiconductor material and a first dopant, has an amorphous layer formed from a top portion of the substrate, and the amorphous layer is doped with a second dopant of polarity opposite to a polarity of the first dopant. Heating of the wafer at 450 to 625 degree C. recrystallizes a portion of the amorphous layer that is adjacent to the substrate at a recrystallization rate that depends on a local temperature on the wafer surface. The measured spatial distribution of sheet resistance may be utilized to readjust the spatial distribution of heat input to another wafer in order to achieve a more uniform temperature across the other wafer's surface.Type: GrantFiled: July 22, 2002Date of Patent: October 28, 2003Assignee: International Business Machines CorporationInventors: Donna K. Johnson, Jerome B. Lasky, Glenn R. Miller
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Publication number: 20020176998Abstract: A method, and associated structure, for fabricating a semiconductor wafer that may be used to monitor the temperature distribution across the wafer surface. Given a substrate that includes a semiconductor material and a first dopant, an amorphous layer is formed from a top portion of the substrate, and the amorphous layer is doped with a second dopant of polarity opposite to a polarity of the first dopant. The amorphous layer may be formed by directing an-ionic species, such as ionic germanium, into the top portion of the substrate. Alternatively, particular second dopants, such as arsenic, may serve to also amorphize the top portion of the substrate. Next, the wafer is heated to a temperature in a range of 450 to 625° C. The heating of the wafer recrystallizes a portion of the amorphous layer that is adjacent to the substrate at a recrystallization rate that depends on a local temperature on the wafer surface.Type: ApplicationFiled: July 22, 2002Publication date: November 28, 2002Inventors: Donna K. Johnson, Jerome B. Lasky, Glenn R. Miller
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Patent number: 6472232Abstract: A method, and associated structure, for fabricating a semiconductor wafer that may be used to monitor the temperature distribution across the wafer surface. Given a substrate that includes a semiconductor material and a first dopant, an amorphous layer is formed from a top portion of the substrate, and the amorphous layer is doped with a second dopant of polarity opposite to a polarity of the first dopant. The amorphous layer may be formed by directing an ionic species, such as ionic germanium, into the top portion of the substrate. Alternatively, particular second dopants, such as arsenic, may serve to also amorphize the top portion of the substrate. Next, the wafer is heated to a temperature in a range of 450 to 625° C. The heating of the wafer recrystallizes a portion of the amorphous layer that is adjacent to the substrate at a recrystallization rate that depends on a local temperature on the wafer surface.Type: GrantFiled: February 22, 2000Date of Patent: October 29, 2002Assignee: International Business Machines CorporationInventors: Donna K. Johnson, Jerome B. Lasky, Glenn R. Miller
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Publication number: 20020004303Abstract: A method for removing a formation of oxide of titanium that is generated as a by product of a process that forms cobalt disilicide within an insulated-gate field effect transistor (FET). The method applies a chemical reagent to the FET at a predetermined temperature, and for a predetermined period of time, necessary for removing the formation, wherein the reagent does not chemically react with the cobalt disilicide. A reagent that accomplishes this task comprises water (H2O), ammonium hydroxide (NH4OH), and hydrogen peroxide (H2O2), wherein the NH4OH and the H2O2 each comprise approximately 4% of the total reagent volume. An effective temperature is 65 ° C. combined with a 3 minute period of application.Type: ApplicationFiled: August 27, 2001Publication date: January 10, 2002Inventors: David Paul Agnello, Mary Conroy Bushey, Donna K. Johnson, Jerome Brett Lasky, Peter James Lindgren, Kirk David Peterson
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Patent number: 6335294Abstract: A method for removing a formation of oxide of titanium that is generated as a byproduct of a process that forms cobalt disilicide within an insulated-gate field effect transistor (FET). The method applies a chemical reagent to the FET at a predetermined temperature, and for a predetermined period of time, necessary for removing the formation, wherein the reagent does not chemically react with the cobalt disilicide. A reagent that accomplishes this task comprises water (H2O), ammonium hydroxide (NH4OH), and hydrogen peroxide (H2O2), wherein the NH4OH and the H2O2 each comprise approximately 4% of the total reagent volume. An effective temperature is 65° C. combined with a 3 minute period of application.Type: GrantFiled: April 22, 1999Date of Patent: January 1, 2002Assignee: International Business Machines CorporationInventors: David Paul Agnello, Mary Conroy Bushey, Donna K. Johnson, Jerome Brett Lasky, Peter James Lindgren, Kirk David Peterson
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Patent number: 6271054Abstract: The dark current defects in a charge couple device are reduced by employing a hydrogen anneal followed by depositing a silicon nitride barrier layer by RTCVD.Type: GrantFiled: June 2, 2000Date of Patent: August 7, 2001Assignee: International Business Machines CorporationInventors: Arne W. Ballantine, George A. Dunbar, III, James V. Hart, III, Donna K. Johnson, Glenn C. MacDougall