Abstract: An electrode for a memory material of a phase change memory device is disclosed. The electrode includes a first layer adhered to the memory material, the first layer including a nitride (ANx), where A is one of titanium (Ti) and tungsten (W) and x greater than zero, but is less than 1.0, and a second layer adhered to the first layer, the second layer including a nitride (ANy), where y is greater than or equal to 1.0. The multiple layer electrode allows the first layer to better adhere to chalcogenide based memory material, such as GST, than for example, stoichiometric TiN or WN, which prevents delamination. A phase change memory device and method are also disclosed.

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse.

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse.

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse.

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse.

Abstract: A structure and method for making a cavity fuse over a gate conductor stack.

Abstract: The adhesion of a silicon carbide containing film to a surface is enhanced by employing a transition film of silicon nitride, silicon dioxide and/or silicon oxynitride.

Abstract: Filling of narrow and/or high aspect ratio gaps and trenches with silicate glass is accomplished at reduced temperatures and without reflow by etching the glass concurrently with thermal chemical vapor deposition of the glass such that the deposition rate will exceed the etching rate by a relatively small net deposition rate near the surface with the excess deposition rate increasing over the depth of the trench or gap. The as-deposited glass film is made dense and stable by carrying out the concurrent etch and deposition process at an elevated temperature but which is within the maximum temperature and heat budget which can be tolerated by structures formed by previously performed processes. Fluorine can be incorporated in the silicate glass film as a dopant in sufficient concentration to reduce dielectric constant of the film. Phosphorus and/or boron can be incorporated into the film, as well, and may enhance void-free filling of trenches and gaps.

Abstract: A contact stud for a semiconductor structure is fabricated by providing a semiconductor substrate having an alignment structure, which includes a sidewall, and the semiconductor structure formed thereon, forming a sidewall spacer contiguous with the semiconductor structure and the sidewall of the alignment structure, depositing an insulating layer contiguous with the sidewall spacer so as to insulate the semiconductor structure, etching the sidewall spacer selectively to the sidewall of the alignment structure, the semiconductor structure and the insulating layer for forming a contact window opening for allowing access to the semiconductor structure, and backfilling the contact window opening with a conductive material so as to contact the semiconductor structure for forming the stud.

Abstract: Disclosed is a process for etching a film of boron nitride with high selectivity to a layer of silicon dioxide or silicon nitride. The process involves exposing the film to a plasma formed from a mixture of an oxygen-containing gas, such as oxygen, and a small amount of a fluorine-containing gas, such as CF.sub.4. The process provides a high etch rate and anisotropic profiles, as well as good uniformity.

Abstract: A contact stud for a semiconductor structure is fabricated by providing a semiconductor substrate having an alignment structure, which includes a sidewall, and the semiconductor structure formed thereon, forming a sidewall spacer contiguous with the semiconductor structure and the sidewall of the alignment structure, depositing an insulating layer contiguous with the sidewall spacer so as to insulate the semiconductor structure, etching the sidewall spacer selectively to the sidewall of the alignment structure, the semiconductor structure and the insulating layer for forming a contact window opening for allowing access to the semiconductor structure, and backfilling the contact window opening with a conductive material so as to contact the semiconductor structure for forming the stud.

Abstract: Self-aligning process for fabricating a semiconductor structure and stud therefor on a semiconductor substrate comprises depositing a first material onto the substrate, depositing a second material onto the first material, removing excess portions of second material so as to form openings through the second material exposing excess portions of first material, whereby a selected portion of second material is retained and forms a sacrificial element, removing the excess portions of first material selectively to the substrate so as to extend the openings through the first material to the substrate, whereby a selected portion of first material is retained and forms the semiconductor structure, filling the openings with an insulating material, removing the sacrificial element selectively to the insulating material and the semiconductor structure for forming a contact window opening for allowing access to the semiconductor structure, and filling the contact window opening with stud material so as to contact the sem

Abstract: A contact stud for semiconductor structure is fabricated by providing a semiconductor substrate having an alignment structure, which includes a sidewall, and the semiconductor structure formed thereon, forming a sidewall spacer contiguous with the semiconductor structure and the sidewall of the alignment structure, depositing an insulating layer contiguous with the sidewall spacer so as to insulate the semiconductor structure, etching the sidewall spacer selectively to the sidewall of the alignment structure, the semiconductor structure and the insulating layer forming a contact window opening for allowing access to the semiconductor structure, and backfilling the contact window opening with a conductive material so as to contact the semiconductor structure for forming the stud.