Abstract: A graded oxide MIM or MIS structure employs band gap grading of the insulator oxide so that holes or electrons (depending on voltage bias) can be injected into the insulator oxide under moderate electric field conditions from the contact at one interface. Electron or hole injection from the opposite interface is blocked due to the larger insulator band gap near this interface. A graded oxide metal-silicon dioxide-silicon (MGOS) semiconductor structure may be fabricated by forming several pyrolytic or CVD SiO.sub.2 layers over a relatively thick thermal SiO.sub.2 layer, with the pyrolytic SiO.sub.2 layers having sequentially increasing excess Si content. This structure may also be fabricated by controlled Si ion implantation in the thermal SiO.sub.2 layer.