Abstract: A technique of partitioning compressed data includes splitting the compressed data into multiple portions. The technique further includes storing a decompression state in association with a current portion, wherein the decompression state is based on data of a previous portion and enables decompression of the current portion independently of other portions.

Abstract: A technique for managing multi-dimensional data includes providing an original dataset containing data arranged along multiple dimensions, each dimension covering a respective original range of dimensional units. The technique further includes extracting multiple portions of data from the original dataset, each portion extending over a reduced range of dimensional units, smaller than the original range, in at least one dimension, and all extracted portions together covering the original ranges of the original dataset in all dimensions.

Abstract: A technique for managing data objects in a storage cluster includes splitting a data object into multiple portions at boundaries within the data object. The technique further includes transforming the portions of the data object into segments that provide individually processable units, and distributing the segments among multiple computing nodes of the storage cluster for storage therein.

Abstract: A technique for managing data objects in a storage cluster includes splitting a data object into multiple portions at boundaries within the data object. The technique further includes transforming the portions of the data object into segments that provide individually processable units, and distributing the segments among multiple computing nodes of the storage cluster for storage therein.

Abstract: A technique of partitioning compressed data includes splitting the compressed data into multiple portions. The technique further includes storing a decompression state in association with a current portion, wherein the decompression state is based on data of a previous portion and enables decompression of the current portion independently of other portions.

Abstract: A technique for managing data objects in a storage cluster includes splitting a media data object into multiple portions at boundaries within the media data object. The technique further includes transforming the portions of the media data object into segments that provide individually processable units and distributing the segments among multiple computing nodes of the storage cluster for storage therein.

Abstract: A technique for managing data objects in a storage cluster includes splitting a data object into multiple portions at boundaries within the data object. The technique further includes transforming the portions of the data object into segments that provide individually processable units, and distributing the segments among multiple computing nodes of the storage cluster for storage therein.

Abstract: This described technology generally relates to a data management system configured to implement, among other things, web-scale computing services, data storage and data presentation. Web-scale computing services are the fastest growing segment of the computing technology and services industry. In general, web-scale refers to computing platforms that are reliable, transparent, scalable, secure, and cost-effective. Illustrative web-scale platforms include utility computing, on-demand infrastructure, cloud computing, Software as a Service (SaaS), and Platform as a Service (PaaS). Consumers are increasingly relying on such web-scale services, particularly cloud computing services, and enterprises are progressively migrating applications to operate through web-scale platforms.

Abstract: Method and systems for distributing the translation layer of storage media (such as NAND Flash or Storage Class Memory Storage) system across various storage system components are described herein. Non-limiting examples of storage system components include a Persistent Storage Device (PSD), a Storage Aggregation Controller (SAC), and a Storage Management Writer (SMW). The SMW may be configured to maintain a table of the logical address of each page it writes to a PSD via a SAC. The SAC may maintain the status of the validity of previously written pages with the SMW informing the SAC when any page is no longer valid. The PSD may handle device specific issues including error correction and block-level mapping for management of block-level failures and internal wear-leveling. The SAC may handle garbage collection of the physical pages within the PSDs it is managing, while the SMW may maintain the actual page-level tables.

Abstract: A technique for housing printed circuit board assemblies (PCAs) includes providing a set of backplane or midplane boards that are oriented orthogonally and edge-to-edge with an array of PCAs such that air introduced at one end of the chassis passes in a straight line course through the PCAs and through the backplane or midplane boards with no substantial bends or changes in direction.

Abstract: A technique for communicating electronic signals between circuit boards includes separating conductive traces for carrying TX signals from those for carrying RX signals and conveying the separated TX and RX signals between circuit boards on respective sets of distinct midplane circuit board layers. The layers may be distinct circuit board layers on a single board or distinct layers on different boards.

Abstract: A data storage array is described, having a plurality of solid state disks configured as a RAID group. User data is mapped and managed on a page size scale by the controller, and the data is mapped on a block size scale by the solid state disk. The writing of data to the solid state disks of the RAID group is such that reading of data sufficient to reconstruct a RAID stripe is not inhibited by the erase operation of a disk to which data is being written.

Abstract: A telecommunications switch. The switch includes a first output port mechanism through which sessions having cells are sent at a total session rate to a network. The switch includes a first input port mechanism through which sessions are received from the network. The first input port mechanism is connected to the first output port mechanism. The first input port mechanism has a first guaranteed session rate. The switch includes a second input port mechanism through which sessions are received from the network. The second input port mechanism is connected to the first output port mechanism. The second input port mechanism has a second guaranteed session rate, the sum of all guaranteed session rates are less than or equal to the total session rate. The switch includes a first scheduler connected to the first and second input port mechanisms and to the first output port mechanism for scheduling sessions of the input port mechanisms for service.

Abstract: A scheduler for a server for serving ATM cells. The scheduler includes R rate bins where R is greater than or equal to 2. The scheduler includes a controller which places a session having a desired rate into a rate bin of the R rate bins. A system for transmitting ATM cells. The system includes an ATM network along which ATM cells are transmitted. The system includes S sources where S is greater than or equal to 1 and is an integer. Each source is connected to the network and produces ATM cells for transmission on the network. The system includes D destinations where D is greater than or equal to 1 and is an integer. Each destination is connected to the network. Each destination receives ATM cells from the network. The system includes a server connected to the ATM network. Additionally, the system includes a scheduler which has R different rate bins for holding sessions, where R is an integer greater than or equal to 2.

Abstract: The present invention pertains to an ATM cell interface for dispatching ATM cells, each ATM cell having a header with a VPI field having a value and a VCI field having a value. The interface comprises L input ports to which ATM cells enter the interface, where L is greater than or equal to 1 and is an integer. The interface also comprises Q output ports through which ATM cells exit the interface, where Q is greater than or equal to 1 and is an integer. The interface comprises a memory mechanism 24 having serial access memory management. Additionally, the interface comprises a mechanism for directing the ATM cells from an input port of the L input ports to any desired destination through at least one output port 22 of the Q output ports 22. The directing mechanism 26 has entities which identify desired destinations for a corresponding ATM cell.

Abstract: The present invention pertains to an ATM cell interface for dispatching ATM cells, each ATM cell having a header with a VPI field having a value and a VCI field having a value. The interface comprises L input ports to which ATM cells enter the interface, where L is greater than or equal to 1 and is an integer. The interface also comprises Q output ports through which ATM cells exit the interface, where Q is greater than or equal to 1 and is an integer. The interface comprises a memory mechanism 24 having serial access memory management. Additionally, the interface comprises a mechanism for directing the ATM cells from an input port of the L input ports to any desired destination through at least one output port 22 of the Q output ports 22. The directing mechanism 26 has entities which identify desired destinations for a corresponding ATM cell.