Abstract: Provided are a nitride semiconductor field effect transistor (FET) and a method of fabricating the nitride semiconductor FET. The nitride semiconductor FET includes a first semiconductor layer, a second semiconductor layer, a two-dimensional electron gas layer, a T-shaped gate, and a source/drain ohmic electrode. The first semiconductor layer is formed on a substrate. The second semiconductor layer is formed on the first semiconductor layer and has a bandgap energy that is different from the bandgap energy of the first semiconductor layer. The two-dimensional electron gas layer is formed of a hetero-junction of the first semiconductor layer and the second semiconductor layer in an interfacial area between the first semiconductor layer and the second semiconductor layer. The T-shaped gate is formed on the second semiconductor layer and is connected to the second semiconductor layer.

Abstract: Provided is a field effect transistor. The field effect transistor includes an insulating vanadium dioxide (VO2) thin film used as a channel material, a source electrode and a drain electrode disposed on the insulating VO2 thin film to be spaced apart from each other by a channel length, a dielectric layer disposed on the source electrode, the drain electrode, and the insulating VO2 thin film, and a gate electrode for applying a predetermined voltage to the dielectric layer.

Abstract: Provided are a nitride semiconductor field effect transistor (FET) and a method of fabricating the nitride semiconductor FET. The nitride semiconductor FET includes a first semiconductor layer, a second semiconductor layer, a two-dimensional electron gas layer, a T-shaped gate, and a source/drain ohmic electrode. The first semiconductor layer is formed on a substrate. The second semiconductor layer is formed on the first semiconductor layer and has a bandgap energy that is different from the bandgap energy of the first semiconductor layer. The two-dimensional electron gas layer is formed of a hetero-junction of the first semiconductor layer and the second semiconductor layer in an interfacial area between the first semiconductor layer and the second semiconductor layer. The T-shaped gate is formed on the second semiconductor layer and is connected to the second semiconductor layer.