Patents by Inventor Doohyeok Lim

Doohyeok Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10515982
    Abstract: A semiconductor device includes a semiconductor column including a first conductive region of first conductivity type, a second conductive region of second conductivity type, an intrinsic region disposed between the first conductive region and the second conductive region, and a barrier region of the first conductivity type disposed between the intrinsic region and the second conductive region. A gate electrode is disposed to cover the intrinsic region, and a gate insulating layer is disposed between the gate electrode and the intrinsic region. The semiconductor device may operate as a switch or a volatile memory according to a gate voltage applied to a gate and a drain voltage applied to a drain.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: December 24, 2019
    Assignee: Korea University Research and Business Foundation
    Inventors: Sangsig Kim, Kyoungah Cho, Minsuk Kim, Yoonjoong Kim, Sola Woo, Doohyeok Lim
  • Patent number: 10483284
    Abstract: A semiconductor device includes stacked transistors. Each of the transistors includes a semiconductor column including a first conductive region of first conductivity type, a second conductive region of second conductivity type, an intrinsic region disposed between the first conductive region and the second conductive region, and a barrier region of the first conductivity type disposed between the intrinsic region and the second conductive region. A gate electrode is disposed to cover the intrinsic region, and a gate insulating layer is disposed between the gate electrode and the intrinsic region.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: November 19, 2019
    Assignee: Korea University Research and Business Foundation
    Inventors: Sangsig Kim, Kyoungah Cho, Minsuk Kim, Yoonjoong Kim, Sola Woo, Doohyeok Lim
  • Publication number: 20180138200
    Abstract: A semiconductor device includes stacked transistors. Each of the transistors includes a semiconductor column including a first conductive region of first conductivity type, a second conductive region of second conductivity type, an intrinsic region disposed between the first conductive region and the second conductive region, and a barrier region of the first conductivity type disposed between the intrinsic region and the second conductive region. A gate electrode is disposed to cover the intrinsic region, and a gate insulating layer is disposed between the gate electrode and the intrinsic region.
    Type: Application
    Filed: January 12, 2018
    Publication date: May 17, 2018
    Inventors: Sangsig Kim, Kyoungah Cho, Minsuk Kim, Yoonjoong Kim, Sola Woo, Doohyeok Lim
  • Publication number: 20180138199
    Abstract: A semiconductor device includes a semiconductor column including a first conductive region of first conductivity type, a second conductive region of second conductivity type, an intrinsic region disposed between the first conductive region and the second conductive region, and a barrier region of the first conductivity type disposed between the intrinsic region and the second conductive region. A gate electrode is disposed to cover the intrinsic region, and a gate insulating layer is disposed between the gate electrode and the intrinsic region. The semiconductor device may operate as a switch or a volatile memory according to a gate voltage applied to a gate and a drain voltage applied to a drain.
    Type: Application
    Filed: January 12, 2018
    Publication date: May 17, 2018
    Inventors: Sangsig Kim, Kyoungah Cho, Minsuk Kim, Yoonjoong Kim, Sola Woo, Doohyeok Lim
  • Patent number: 9837155
    Abstract: A memory device includes: a semiconductor column extending vertically on a substrate and including a source region of a first conductivity type, an intrinsic region, and a drain region of a second conductivity type; a first gate electrode disposed adjacent to the drain region to cover the intrinsic region; a second gate electrode spaced apart from the first gate electrode and disposed adjacent to the source region to cover the intrinsic region; a first gate insulating layer disposed between the first gate electrode and the intrinsic region; and a second gate insulating layer disposed between the second gate electrode and the intrinsic region.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: December 5, 2017
    Assignee: Korea University Research and Business Foundation
    Inventors: Sangsig Kim, Youngin Jeon, Minsuk Kim, Doohyeok Lim
  • Publication number: 20170330623
    Abstract: A memory device, an operating method of the memory device, and a fabricating method of the memory device are provided. A memory device includes: a semiconductor column extending vertically on a substrate and including a source region of a first conductivity type, an intrinsic region, and a drain region of a second conductivity type; a first gate electrode disposed adjacent to the drain region to cover the intrinsic region; a second gate electrode spaced apart from the first gate electrode and disposed adjacent to the source region to cover the intrinsic region; a first gate electrode disposed between the first gate electrode and the intrinsic region; and a second gate insulating layer disposed between the second gate electrode and the intrinsic region.
    Type: Application
    Filed: June 17, 2016
    Publication date: November 16, 2017
    Inventors: Sangsig Kim, Youngin Jeon, Minsuk Kim, Doohyeok Lim