Abstract: Provided is a display device. The display device comprises a substrate, and a plurality of sub-pixels disposed on the substrate and including alight emitting element and a sub-pixel circuit driving the light emitting element. The sub-pixel circuit comprises a driving transistor controlling a driving current flowing through the light emitting element, a first transistor and a second transistor connected in series between a first node, which is a drain electrode of the driving transistor, and a second node, which is a gate electrode of the driving transistor, to receive the same scan signal, and a gate auxiliary electrode disposed on a gate electrode of the first transistor or the second transistor. The gate auxiliary electrode is connected to the gate electrode of the first transistor or the second transistor.

Abstract: A display device includes a driving circuit that drives a pixel, and a display region including the pixel. The pixel includes a light emitting element electrically connected between a first power source and a second power source, a first transistor electrically connected between the first power source and the light emitting element to control a driving current, the first transistor including a first gate electrode electrically connected to a first node, and a second gate electrode electrically connected to a bias control line, and a switching transistor electrically connected between a data line and the first node, the switching transistor including a gate electrode electrically connected to a scan line. The driving circuit varies a control signal provided to the bias control line in a second period based on a first data signal provided to the data line during a first period.

Abstract: A display device includes: a pixel unit including a plurality of pixels; a scan driver having a plurality of stages and configured to supply a scan signal to the pixel unit; and a light emission control driver having a plurality of stages and configured to supply a light emission control signal to the pixel unit, wherein a first transistor of a plurality of transistors included in at least one of the stages of the scan driver or the stages of the light emission control driver comprises: an active layer pattern on a base layer, and including a channel region forming a channel, and first and second regions on opposite sides of the channel region; and a gate electrode spaced apart from the active layer pattern with a first insulating film therebetween, and overlapping the channel region.

Abstract: A display device includes: a first semiconductor layer on a first buffer layer, and including a first active layer; a first gate insulating layer on the first semiconductor layer, and covering the first active layer; a first conductive layer on the first gate insulating layer, and including a first gate electrode; a second conductive layer on the first conductive layer, and including a first source/drain electrode; a first interlayer insulating layer on the first conductive layer; a second semiconductor layer on the first interlayer insulating layer, and including a second active layer; a second gate insulating layer on the second semiconductor layer, and covering the second active layer; and a third conductive layer on the second gate insulating layer, and including a second gate electrode and a second source/drain electrode. The first gate insulating layer and the second gate insulating layer include different insulating materials from each other.

Abstract: A display device includes pixels at least one of which includes a light emitting element connected between a first power source and a second power source, a first transistor connected between the first power source and the light emitting element and controlling a driving current flowing through the light emitting element in response to a voltage of a first node, a switching transistor connected to the first node and including and active layer that includes first and second conductive regions spaced apart from each other, first and second channel regions disposed between the first and second conductive regions, and a common conductive region disposed between the first and second channel regions, and a conductive pattern overlapping the active layer to face the common conductive region.

Abstract: A display device includes: a plurality of pixels connected to gate lines and data lines; a gate driver to supply a gate signal to the gate lines; and a data driver to supply a data signal to the data lines. The gate driver includes: a first transistor including a first active layer at a first layer; and a second transistor including a second active layer at a second layer on the first layer.

Abstract: A display device includes a pixel disposed in a display region. The pixel includes a light-emitting element connected between a first power source and a second power source; a first transistor connected between the first power source and the light-emitting element to control a driving current flowing in the light-emitting element in response to a voltage of a first node; and at least one switching transistor to transmit a data signal or a voltage of an initialization power source to the first node. The switching transistor includes a first channel region, a first conductive region and a second conductive region which are respectively disposed at opposite sides of the first channel region, and a first wide band-gap region disposed between the first channel region and the second conductive region.

Abstract: A display device includes: a pixel at a display region. The pixel includes: a light-emitting element connected between a first power source and a second power source; and a first transistor connected between the first power source and the light-emitting element, the first transistor to control a driving current of the light-emitting element in response to a voltage of a first node. The first transistor includes a first driving transistor and a second driving transistor that are connected in series with each other between the first power source and the light-emitting element, and the first driving transistor and the second driving transistor have structures that are asymmetric with each other in a cross-sectional view.

Abstract: An ultrasonic sensing device includes: a sensing layer between a driving electrode and a sensing electrode, wherein the sensing layer is configured to generate an electrical signal according to an ultrasound; and a first transistor comprising a first gate electrode connected to a selection line and a second gate electrode connected to the sensing electrode.

Abstract: A transistor includes a buffer layer, an active pattern, and a first insulating layer. The buffer layer is doped with an impurity. The active pattern is on the buffer layer and includes a channel area between a source area and a drain area. The first insulating layer is on the active pattern. A gate electrode is on the first insulating layer and overlaps the channel area. A source electrode is insulated from the gate electrode and is electrically coupled with the source area. A drain electrode is insulated from the gate electrode and is electrically coupled with the drain area.

Abstract: According to a method of manufacturing a thin film transistor substrate, a composition including a metal oxalate and a solvent for manufacturing an oxide semiconductor is coated to form a thin film, the thin film is annealed, and the thin film is patterned to form a semiconductor pattern.

Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.

Abstract: A thin film transistor array panel including: an insulation substrate, a gate line provided on the insulation substrate and including a gate electrode, a gate insulating layer provided on the gate line, a semiconductor layer provided on the gate insulating layer, and a source electrode and a drain electrode provided on the semiconductor layer and separated from each other, and the gate insulating layer includes a fluorinated silicon oxide (SiOF) layer, and the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor, and a threshold voltage shift value of the thin film transistor is substantially less than 4.9 V.

Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.

Abstract: In a method of manufacturing a thin film transistor, a gate electrode is formed on a first surface of a base substrate, a oxide semiconductor layer, insulation layer and photo resist layer are formed an the fast surface of the base substrate having the gate electrode. The insulation layer and the oxide semiconductor layer are patterned using a first photo resist pattern to form an etch-stopper and an active pattern. A source and a drain electrode are formed on the base substrate having the active pattern and the etch-stopper, the source electrode and the drain electrode are overlapped with both ends of the etch-stopper and spaced apart from each other. Therefore, a manufacturing cost may be decreased by omitting a mask when forming the active pattern and the etch-stopper.

Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] / 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.

Abstract: A mobile device having at least two antennas can circumvent transmission problems caused by a user's grasp of the device. A sensor unit is disposed at a specific location of a device body and creates a sensor signal by detecting the contact or proximity of a particular object such a user's hand. When receiving the sensor signal, a control unit selects one of the antennas depending on the sensor signal and establishes a communication path based on the selected antenna. The selected antenna involved in the communication path is typically relatively free from degradation in transmission caused by a user's grasp of the mobile device. The radiation property of the mobile device, which may be degraded due to a user's grasp, can exhibit relatively little or no degradation as compared to the typical degradation in performance when the mobile device is being grasped.

Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio (R, R[mol %]=[In]/[In+Zn+Sn]/100) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, R[mol %]=[In]/[In+Zn+Sn]/100) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.

Abstract: A method of manufacturing a thin-film transistor substrate includes: applying a composition on a substrate to form a thin-film on the substrate, heating the thin-film, and patterning the thin-film to form an oxide semiconductor pattern. The composition includes a metal nitrate and water. The potential of hydrogen (pH) of the composition is about 1 to about 4.

Abstract: In a method of manufacturing a thin film transistor, a gate electrode is formed on a first surface of a base substrate, a oxide semiconductor layer, insulation layer and photo resist layer are formed an the fast surface of the base substrate having the gate electrode. The insulation layer and the oxide semiconductor layer are patterned using a first photo resist pattern to form an etch-stopper and an active pattern. A source and a drain electrode are formed on the base substrate having the active pattern and the etch-stopper, the source electrode and the drain electrode are overlapped with both ends of the etch-stopper and spaced apart from each other. Therefore, a manufacturing cost may be decreased by omitting a mask when forming the active pattern and the etch-stopper.