Abstract: A system and method for detecting biofluid is disclosed, specifically utilizing a signaling element and a reader, wherein the signaling element comprises a sensing element, an impedance measuring circuit, an oscillator circuit, an acoustic transducer, and a power supply source, while the reader device comprises a microphone and a processor.

Abstract: A system and method for detecting biofluid is disclosed, specifically utilizing a signaling element and a reader, wherein the signaling element comprises a sensing element, an impedance measuring circuit, an oscillator circuit, an acoustic transducer, and a power supply source, while the reader device comprises a microphone and a processor.

Abstract: The present invention is directed to a system and apparatus for detecting moisture or fluid using a processing unit and a sensor pad comprising interdigitated conductive leads connected to a coupling unit. The processing unit and coupling unit may be connected wirelessly or via wires. The presence of moisture or fluid may be determined as a function of at least one aspect of the complex impedance as determined by a signal analysis unit.

Abstract: The present invention is directed to a system and apparatus for detecting moisture or fluid using a processing unit and a sensor pad comprising interdigitated conductive leads connected to a coupling unit. The processing unit and coupling unit may be connected wirelessly or via wires. The presence of moisture or fluid may be determined as a function of at least one aspect of the complex impedance as determined by a signal analysis unit.

Abstract: In accordance with the teachings described herein, systems and methods are provided for reducing the lock time of a phase locked loop circuit. A phase comparator may be used to detect a phase error between an input reference signal and a feedback clock signal. A frequency synthesizer circuit may be used to control the frequency of an output clock signal as a function of the phase error between the input signal and the feedback clock signal. A feedback divider may be used to divide the frequency of the output clock signal to generate the feedback clock signal. A phase error monitor may be used to detect when the phase error between the input signal and the feedback clock signal reaches a peak value, and in response to detecting the peak value, initialize the feedback divider to reduce the phase error between the input signal and the feedback clock signal.