Abstract: A shadow mask for depositing solder bumps includes additional dummy holes located adjacent holes corresponding to most of the perimeter chips of the wafer. The additional dummy provide more uniform plasma etching of contacts of the wafer, improve etching of contacts of perimeter chips, and lower contact resistance of contacts of perimeter chips. The extra holes also provide solder bumps outside the perimeter chips that can be used to support a second shadow mask for deposition of an additional material, such as tin, on the reflowed solder bumps for mounting the chips on a plastic substrate at low temperature. An improved mask to wafer alignment aid is formed from standard solder bumps. The improved alignment aid avoids damage to test probes and provides improved course alignment.

Abstract: Disclosed is a method of manufacturing a metal mask for an integrated circuit chip interconnect solder bump. The invention deposits a very thick photoresist on both sides of a very thick molybdenum foil sheet (the molybdenum sheet is at least 8 mils thick and the photoresist is at least 5 microns thick). Then the process exposes and develops the photoresist to produce at least one opening having a diameter of at least 5 mil. The invention simultaneously etches both sides of the molybdenum foil using a very low etchant spray pressure of approximately 5 psi to form at least one via in the molybdenum foil that has a diameter of at least 12 mil and a knife-edge of 0.2 mil. The photoresist is removed after the etching process.

Abstract: A method of making, and the resultant mask, comprises developing resist layers over surfaces of a masking layer to transfer significantly reduced sized openings within glass masters attached to the surfaces of the masking layer into the resist layers. These significantly reduced sized openings within the resist layers are then transferred into the masking layer within a first etch bath by simultaneously monitoring and controlling both etchant activity and concentration of a byproduct within the etch bath formed between the masking material and the etchant. The openings may be etched to completion within the first etch bath, or alternatively, the openings may be etched to a pre-finished image size. Wherein the openings are etched to a pre-finished image size, the masking layer is immersed into a second etch bath for further micro-etching of these openings to a final desired image size.

Abstract: A shadow mask for depositing solder bumps includes additional dummy holes located adjacent holes corresponding to most of the perimeter chips of the wafer. The additional dummy provide more uniform plasma etching of contacts of the wafer, improve etching of contacts of perimeter chips, and lower contact resistance of contacts of perimeter chips. The extra holes also provide solder bumps outside the perimeter chips that can be used to support a second shadow mask for deposition of an additional material, such as tin, on the reflowed solder bumps for mounting the chips on a plastic substrate at low temperature. An improved mask to wafer alignment aid is formed from standard solder bumps. The improved alignment aid avoids damage to test probes and provides improved course alignment.

Abstract: A shadow mask for depositing solder bumps includes additional dummy holes located adjacent holes corresponding to most of the perimeter chips of the wafer. The additional dummy provide more uniform plasma etching of contacts of the wafer, improve etching of contacts of perimeter chips, and lower contact resistance of contacts of perimeter chips. The extra holes also provide solder bumps outside the perimeter chips that can be used to support a second shadow mask for deposition of an additional material, such as tin, on the reflowed solder bumps for mounting the chips on a plastic substrate at low temperature. An improved mask to wafer alignment aid is formed from standard solder bumps. The improved alignment aid avoids damage to test probes and provides improved course alignment.

Abstract: A shadow mask for depositing solder bumps includes additional dummy holes located adjacent holes corresponding to most of the perimeter chips of the wafer. The additional dummy provide more uniform plasma etching of contacts of the wafer, improve etching of contacts of perimeter chips, and lower contact resistance of contacts of perimeter chips. The extra holes also provide solder bumps outside the perimeter chips that can be used to support a second shadow mask for deposition of an additional material, such as tin, on the reflowed solder bumps for mounting the chips on a plastic substrate at low temperature. An improved mask to wafer alignment aid is formed from standard solder bumps. The improved alignment aid avoids damage to test probes and provides improved course alignment.

Abstract: A process for forming parabolic micro-reflectors on an object includes the steps of placing the object proximate to a transfer lens system, shining a laser beam through the lens system, a mask and a wobble plate and onto the object, the wobble plate wobbling the laser beam such that a parabolic shaped micro-reflector is formed on the object.

Abstract: A laser ablation mask and a method of fabrication therefor. The mask has a pattern of clear areas and scattering areas. The scattering areas are covered with randomly formed facets. The facets act as scattering centers. Areas clear of facets transmit laser energy. Scattering areas refract laser energy. Laser energy directed at the mask, will pass through the clear mask areas to selectively ablate an organic layer placed opposite the mask. However, laser energy is scattered when striking and passing through the scattering areas such that insufficient laser energy passes directly through the mask to reach the organic layer for ablation to occur. The mask is formed by depositing and patterning a metal mask layer on a quartz plate. The patterned mask layer protects intended clear areas. Scattering areas are formed in unprotected plate areas by subjecting the plate to a polymethacrylic acid/bifluoride solution.