Patents by Inventor Doris Pulaski

Doris Pulaski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070045830
    Abstract: A shadow mask for depositing solder bumps includes additional dummy holes located adjacent holes corresponding to most of the perimeter chips of the wafer. The additional dummy provide more uniform plasma etching of contacts of the wafer, improve etching of contacts of perimeter chips, and lower contact resistance of contacts of perimeter chips. The extra holes also provide solder bumps outside the perimeter chips that can be used to support a second shadow mask for deposition of an additional material, such as tin, on the reflowed solder bumps for mounting the chips on a plastic substrate at low temperature. An improved mask to wafer alignment aid is formed from standard solder bumps. The improved alignment aid avoids damage to test probes and provides improved course alignment.
    Type: Application
    Filed: October 16, 2006
    Publication date: March 1, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Harry Cox, David Daniel, Leonard Gardecki, Albert Gregoritsch, Ruth Machell Julianelle, Charles Keeler, Doris Pulaski, Mary Schaffer, David Smith, David Specht, Adolf Wirsing
  • Patent number: 7077974
    Abstract: A method of making, and the resultant mask, comprises developing resist layers over surfaces of a masking layer to transfer significantly reduced sized openings within glass masters attached to the surfaces of the masking layer into the resist layers. These significantly reduced sized openings within the resist layers are then transferred into the masking layer within a first etch bath by simultaneously monitoring and controlling both etchant activity and concentration of a byproduct within the etch bath formed between the masking material and the etchant. The openings may be etched to completion within the first etch bath, or alternatively, the openings may be etched to a pre-finished image size. Wherein the openings are etched to a pre-finished image size, the masking layer is immersed into a second etch bath for further micro-etching of these openings to a final desired image size.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: July 18, 2006
    Assignee: International Business Machines Corporation
    Inventors: Peter Berasi, Michael Jerome, Doris Pulaski, Robert Rippstein
  • Publication number: 20050001011
    Abstract: Disclosed is a method of manufacturing a metal mask for an integrated circuit chip interconnect solder bump. The invention deposits a very thick photoresist on both sides of a very thick molybdenum foil sheet (the molybdenum sheet is at least 8 mils thick and the photoresist is at least 5 microns thick). Then the process exposes and develops the photoresist to produce at least one opening having a diameter of at least 5 mil. The invention simultaneously etches both sides of the molybdenum foil using a very low etchant spray pressure of approximately 5 psi to form at least one via in the molybdenum foil that has a diameter of at least 12 mil and a knife-edge of 0.2 mil. The photoresist is removed after the etching process.
    Type: Application
    Filed: July 1, 2003
    Publication date: January 6, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Peter Berasi, Michael Jerome, Doris Pulaski, Robert Rippstein