Patents by Inventor Dorothea Werber

Dorothea Werber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11575032
    Abstract: A vertical power semiconductor device includes a semiconductor body having opposing first and second main surfaces. At least part of a gate trench structure formed at the first main surface extends along a first lateral direction. Body and source regions directly adjoin the gate trench structure. A drift region is arranged between the body region and second main surface. A body contact structure includes first and second body contact sub-regions spaced at a first lateral distance along the first lateral direction. Each body contact sub-region directly adjoins the gate trench structure and has a larger doping concentration than the body region. In a channel region between the body contact sub-regions, the body contact structure has a second lateral distance to the gate trench structure along a second lateral direction perpendicular to the first lateral direction. The first lateral distance is equal to or less than twice the second lateral distance.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: February 7, 2023
    Assignee: Infineon Technologies AG
    Inventors: Frank Dieter Pfirsch, Christian Philipp Sandow, Dorothea Werber
  • Publication number: 20210359117
    Abstract: A vertical power semiconductor device includes a semiconductor body having opposing first and second main surfaces. At least part of a gate trench structure formed at the first main surface extends along a first lateral direction. Body and source regions directly adjoin the gate trench structure. A drift region is arranged between the body region and second main surface. A body contact structure includes first and second body contact sub-regions spaced at a first lateral distance along the first lateral direction. Each body contact sub-region directly adjoins the gate trench structure and has a larger doping concentration than the body region. In a channel region between the body contact sub-regions, the body contact structure has a second lateral distance to the gate trench structure along a second lateral direction perpendicular to the first lateral direction. The first lateral distance is equal to or less than twice the second lateral distance.
    Type: Application
    Filed: May 10, 2021
    Publication date: November 18, 2021
    Inventors: Frank Dieter Pfirsch, Christian Philipp Sandow, Dorothea Werber
  • Patent number: 9711626
    Abstract: A reverse-conducting IGBT includes a semiconductor body having a drift region arranged between first and second surfaces. The semiconductor body further includes first collector regions arranged at the second surface and in Ohmic contact with a second electrode, backside emitter regions and in Ohmic contact with the second electrode. In a horizontal direction substantially parallel to the first surface, the first collector regions and backside emitter regions define an rc-IGBT area. The semiconductor body further includes a second collector region of the second conductivity type arranged at the second surface and in Ohmic contact with the second electrode. The second collector region defines in the horizontal direction a pilot-IGBT area. The rc-IGBT area includes first semiconductor regions in Ohmic contact with the first electrode and arranged between the drift region and first electrode.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: July 18, 2017
    Assignee: Infineon Technologies AG
    Inventors: Frank Dieter Pfirsch, Dorothea Werber
  • Patent number: 9571087
    Abstract: According to an embodiment of a method, a semiconductor device is operated in a reverse biased unipolar mode before operating the semiconductor device in an off-state in a forward biased mode. The semiconductor device includes at least one floating parasitic region disposed outside a cell region of the device.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: February 14, 2017
    Assignee: Infineon Technologies AG
    Inventors: Frank Pfirsch, Dorothea Werber, Anton Mauder, Carsten Schaeffer
  • Publication number: 20160226477
    Abstract: According to an embodiment of a method, a semiconductor device is operated in a reverse biased unipolar mode before operating the semiconductor device in an off-state in a forward biased mode The semiconductor device includes at least one floating parasitic region disposed outside a cell region of the device.
    Type: Application
    Filed: December 9, 2015
    Publication date: August 4, 2016
    Inventors: Frank Pfirsch, Dorothea Werber, Anton Mauder, Carsten Schaeffer
  • Patent number: 9362349
    Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: June 7, 2016
    Assignee: Infineon Technologies AG
    Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder, Holger Schulze, Gerhard Miller
  • Patent number: 9337827
    Abstract: An electronic circuit includes a reverse-conducting IGBT and a driver circuit. A first diode emitter efficiency of the reverse-conducting IGBT at a first off-state gate voltage differs from a second diode emitter efficiency at a second off-state gate voltage. A driver terminal of the driver circuit is electrically coupled to a gate terminal of the reverse-conducting IGBT. In a first state the driver circuit supplies an on-state gate voltage at the driver terminal. In a second state the driver circuit supplies the first off-state gate voltage, and in a third state the driver circuit supplies the second off-state gate voltage at the driver terminal. The reverse-conducting IGBT may be operated in different modes such that, for example, overall losses may be reduced.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: May 10, 2016
    Assignee: Infineon Technologies AG
    Inventor: Dorothea Werber
  • Patent number: 9337270
    Abstract: A semiconductor device includes at least one field effect transistor structure, which is formed on a semiconductor substrate. The field effect transistor structure includes a drift region, a body region, a source region and a gate. The source region and the drift region include at least mainly a first conductivity type, wherein the body region includes at least mainly a second conductivity type. The body region includes at least one low doping dose portion extending from the drift region to at least one of the source region or an electrical contact interface of the body region at a main surface of the semiconductor substrate, wherein a doping dose within the low doping dose portion of the body region is less than 3 times a breakdown charge.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: May 10, 2016
    Assignee: Infineon Technologies AG
    Inventors: Frank Dieter Pfirsch, Dorothea Werber
  • Patent number: 9337185
    Abstract: A semiconductor device includes a first doping region extending from a main surface of a semiconductor substrate into the semiconductor substrate. Further, the semiconductor device includes a second doping region arranged adjacent to the first doping region. The first doping region includes at least one low doping dose portion extending from the main surface of the semiconductor substrate to the second doping region. A doping dose within the low doping dose portion of the first doping region is less than 3 times a breakdown charge. Additionally, the semiconductor device includes a first electrode structure in contact with the first doping region at the main surface of the semiconductor substrate. The work function of the first electrode structure at the main surface of the semiconductor substrate is larger than 4.9 eV or lower than 4.4 eV.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: May 10, 2016
    Assignee: Infineon Technologies AG
    Inventors: Frank Pfirsch, Dorothea Werber, Carsten Schaeffer
  • Publication number: 20160035867
    Abstract: A reverse-conducting IGBT includes a semiconductor body having a drift region arranged between first and second surfaces. The semiconductor body further includes first collector regions arranged at the second surface and in Ohmic contact with a second electrode, backside emitter regions and in Ohmic contact with the second electrode. In a horizontal direction substantially parallel to the first surface, the first collector regions and backside emitter regions define an rc-IGBT area. The semiconductor body further includes a second collector region of the second conductivity type arranged at the second surface and in Ohmic contact with the second electrode. The second collector region defines in the horizontal direction a pilot-IGBT area. The rc-IGBT area includes first semiconductor regions in Ohmic contact with the first electrode and arranged between the drift region and first electrode.
    Type: Application
    Filed: July 27, 2015
    Publication date: February 4, 2016
    Inventors: Frank Dieter Pfirsch, Dorothea Werber
  • Patent number: 9240450
    Abstract: A semiconductor device includes a semiconductor body including a drift zone of a first conductivity type, an emitter region of a second, complementary conductivity type configured to inject charge carriers into the drift zone, and an emitter electrode. The emitter electrode includes a metal silicide layer in direct ohmic contact with the emitter region. A net impurity concentration in a portion of the emitter region directly adjoining the metal silicide layer is at most 1×1017 cm?3.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: January 19, 2016
    Assignee: Infineon Technologies AG
    Inventors: Dorothea Werber, Volodymyr Komarnitskyy, Thomas Gutt
  • Patent number: 9231581
    Abstract: According to an embodiment of a method, a semiconductor device is operated in a reverse biased unipolar mode before operating the semiconductor device in an off-state in a forward biased mode. The semiconductor device includes at least one floating parasitic region disposed outside a cell region of the device.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: January 5, 2016
    Assignee: Infineon Technologies AG
    Inventors: Frank Pfirsch, Dorothea Werber, Anton Mauder, Carsten Schaeffer
  • Patent number: 9214521
    Abstract: A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first type, a drift region of the second conductivity type, and a first electrode. The first and second emitter regions are arranged between the drift region and first electrode and each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source and body regions. A parasitic region of the first conductivity type is disposed outside the cell region and includes at least one section with charge carrier lifetime reduction means.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: December 15, 2015
    Assignee: Infineon Technologies AG
    Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder
  • Patent number: 9209109
    Abstract: An IGBT includes a semiconductor portion with IGBT cells. Each IGBT cell includes a source zone of a first conductivity type, a body zone of a second, complementary conductivity type, and a drift zone of the first conductivity type separated from the source zone by the body zone. An emitter electrode includes a main layer and an interface layer. The interface layer directly adjoins at least one of the body zone and a supplementary zone of the second conductivity type. A contact resistance between the semiconductor portion and the interface layer is higher than between the semiconductor portion and a material of the main layer. For example, the interface layer may reduce diode emitter efficiency and reverse recovery losses in IGBTs.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: December 8, 2015
    Assignee: Infineon Technologies AG
    Inventors: Dorothea Werber, Thomas Gutt, Mathias Plappert, Frank Pfirsch
  • Patent number: 9159819
    Abstract: A semiconductor device includes a drift zone of a first conductivity type in a semiconductor body. Controllable cells are configured to form a conductive channel connected with the drift zone in a first state. First zones of the first conductivity type as well as second zones and a third zone of a complementary second conductivity type are between the drift zone and a rear side electrode, respectively. The first, second and third zones directly adjoin the rear side electrode. The third zone is larger and has a lower mean emitter efficiency than the second zones.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: October 13, 2015
    Assignee: Infineon Technologies AG
    Inventors: Frank Pfirsch, Dorothea Werber
  • Publication number: 20150236143
    Abstract: A semiconductor device includes a drift zone of a first conductivity type in a semiconductor body. Controllable cells are configured to form a conductive channel connected with the drift zone in a first state. First zones of the first conductivity type as well as second zones and a third zone of a complementary second conductivity type are between the drift zone and a rear side electrode, respectively. The first, second and third zones directly adjoin the rear side electrode. The third zone is larger and has a lower mean emitter efficiency than the second zones.
    Type: Application
    Filed: February 20, 2014
    Publication date: August 20, 2015
    Inventors: Frank Pfirsch, Dorothea Werber
  • Publication number: 20150228723
    Abstract: A semiconductor device includes a semiconductor body including a drift zone of a first conductivity type, an emitter region of a second, complementary conductivity type configured to inject charge carriers into the drift zone, and an emitter electrode. The emitter electrode includes a metal silicide layer in direct ohmic contact with the emitter region. A net impurity concentration in a portion of the emitter region directly adjoining the metal silicide layer is at most 1×1017 cm?3.
    Type: Application
    Filed: February 12, 2014
    Publication date: August 13, 2015
    Inventors: Dorothea Werber, Volodymyr Komarnitskyy, Thomas Gutt
  • Publication number: 20150179636
    Abstract: A semiconductor device includes at least one field effect transistor structure, which is formed on a semiconductor substrate. The field effect transistor structure includes a drift region, a body region, a source region and a gate. The source region and the drift region include at least mainly a first conductivity type, wherein the body region includes at least mainly a second conductivity type. The body region includes at least one low doping dose portion extending from the drift region to at least one of the source region or an electrical contact interface of the body region at a main surface of the semiconductor substrate, wherein a doping dose within the low doping dose portion of the body region is less than 3 times a breakdown charge.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 25, 2015
    Inventors: Frank Dieter Pfirsch, Dorothea Werber
  • Publication number: 20150179637
    Abstract: A semiconductor device includes a first doping region extending from a main surface of a semiconductor substrate into the semiconductor substrate. Further, the semiconductor device includes a second doping region arranged adjacent to the first doping region. The first doping region includes at least one low doping dose portion extending from the main surface of the semiconductor substrate to the second doping region. A doping dose within the low doping dose portion of the first doping region is less than 3 times a breakdown charge. Additionally, the semiconductor device includes a first electrode structure in contact with the first doping region at the main surface of the semiconductor substrate. The work function of the first electrode structure at the main surface of the semiconductor substrate is larger than 4.9 eV or lower than 4.4 eV.
    Type: Application
    Filed: December 5, 2014
    Publication date: June 25, 2015
    Inventors: Frank Pfirsch, Dorothea Werber, Carsten Schaeffer
  • Patent number: 9018674
    Abstract: A semiconductor includes a drift zone of a first conductivity type arranged between a first side and a second side of a semiconductor body. The semiconductor device further includes a first region of the first conductivity type and a second region of a second conductivity type subsequently arranged along a first direction parallel to the second side. The semiconductor device further includes an electrode at the second side adjoining the first and second regions. The semiconductor device further includes a third region of the second conductivity type arranged between the drift zone and the first region. The third region is spaced apart from the second region and from the second side.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: April 28, 2015
    Assignee: Infineon Technologies AG
    Inventors: Dorothea Werber, Anton Mauder, Frank Pfirsch, Hans-Joachim Schulze, Franz Hirler, Alexander Philippou