Patents by Inventor Doru Cristian Gucea
Doru Cristian Gucea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250081276Abstract: A commissioner device is configured to determine, within a connection interval, a first anchor point during which communication with a first commissionee device occurs using the first communication protocol. The commissioner device is configured to determine, within the connection interval, a second anchor point during which communication with a second commissionee device of the plurality of commissionee devices occurs using the first communication protocol. The second anchor point is after the first anchor point in the connection interval and an end time of the first anchor point is separated from a beginning time of the second anchor point by a time period equal to or greater than a time period required to transmit a data packet using the second communication protocol. The commissioner device is configured to receive, during a time period determined by the second anchor point, a data transmission from the second commissionee device.Type: ApplicationFiled: November 9, 2023Publication date: March 6, 2025Inventors: Doru Cristian GUCEA, Khurram WAHEED, George STEFAN
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Patent number: 11907040Abstract: The processor system includes a processor coupled to a memory having a plurality of memory banks and a region configurable as a heap region. At least one memory bank is allocated to the heap region dependent on a predetermined memory size required for execution of at least one cryptographic operation. At least one further memory bank is allocated to the heap region. The processor system may switch between first and second operating states. The first operating state has a lower power consumption than the second operating state. The processor system switches between a first and second operating mode by setting at least one memory bank and at least one further memory bank to an active state. The processor system switches between the second and first operating mode by setting at least one memory bank to a retention state and the at least one further memory bank to a power-down state.Type: GrantFiled: June 10, 2021Date of Patent: February 20, 2024Assignee: NXP USA, Inc.Inventors: Doru Cristian Gucea, Teodor Cosmin Grumei, Andrei Istodorescu
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Publication number: 20230328646Abstract: Systems and methods for reducing the power consumption of end devices in wireless mesh networks are described. In an illustrative, non-limiting embodiment, an end device may include: a controller; and a memory coupled to the controller, wherein the memory comprises program instructions stored thereon that, upon execution by the controller, cause the end device to transmit a frame to a parent device in a wireless mesh network, wherein the frame has a Frame Pending (FP) bit set to indicate, to the parent device, that the end device is ready to receive data from the parent device in the absence of a subsequent data request.Type: ApplicationFiled: August 11, 2022Publication date: October 12, 2023Applicant: NXP USA, INC.Inventors: Doru Cristian Gucea, Marius Preda, George Stefan
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Patent number: 11711809Abstract: A system for providing an enhanced acknowledgement (ENH-ACK) frame is configured to receive an incoming packet transmitted by an external device, determine that an ENH-ACK response is required based on a MAC header of the incoming packet schedule transmission of the ENH-ACK frame to the external device in accordance with a standard turnaround time limit relative to receipt of the incoming packet, determine contents of one or more packet processed fields of the ENH-ACK frame and populate the one or more packet processed fields, and complete transmission of the ENH-ACK frame with the populated packet processed fields.Type: GrantFiled: August 3, 2021Date of Patent: July 25, 2023Assignee: NXP USA, Inc.Inventors: Doru Cristian Gucea, Khurram Waheed, Marius Preda, Yaoqiao Li
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Publication number: 20220210809Abstract: A system for providing an enhanced acknowledgement (ENH-ACK) frame is configured to receive an incoming packet transmitted by an external device, determine that an ENH-ACK response is required based on a MAC header of the incoming packet schedule transmission of the ENH-ACK frame to the external device in accordance with a standard turnaround time limit relative to receipt of the incoming packet, determine contents of one or more packet processed fields of the ENH-ACK frame and populate the one or more packet processed fields, and complete transmission of the ENH-ACK frame with the populated packet processed fields.Type: ApplicationFiled: August 3, 2021Publication date: June 30, 2022Inventors: Doru Cristian Gucea, Khurram Waheed, Marius Preda, Yaoqiao Li
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Patent number: 11277276Abstract: A mechanism is provided by which a hardware filter on a border router of a wireless personal area network is not overloaded by increasing the probability that the hardware filter will capture all the nodes not on the corresponding WPAN. Network addresses for nodes within a subnet are allocated to have the same multicast address hash value in order to permit router multicast filtering to occur within hardware. Hardware filtering thereby relieves the router processor from performing filtering tasks, reducing resource consumption and decreasing the time used to perform filtering. Embodiments provide this functionality by assigning a unique multicast filter register value to each subnet within a network and allocating network addresses associated with that multicast filter register value through either DHCP or SLAAC address generation.Type: GrantFiled: August 2, 2019Date of Patent: March 15, 2022Assignee: NXP USA, Inc.Inventor: Doru Cristian Gucea
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Publication number: 20220035434Abstract: The processor system includes a processor coupled to a memory having a plurality of memory banks and a region configurable as a heap region. At least one memory bank is allocated to the heap region dependent on a predetermined memory size required for execution of at least one cryptographic operation. At least one further memory bank is allocated to the heap region. The processor system may switch between first and second operating states. The first operating state has a lower power consumption than the second operating state. The processor system switches between a first and second operating mode by setting at least one memory bank and at least one further memory bank to an active state. The processor system switches between the second and first operating mode by setting at least one memory bank to a retention state and the at least one further memory bank to a power-down state.Type: ApplicationFiled: June 10, 2021Publication date: February 3, 2022Inventors: Doru Cristian Gucea, Teodor Cosmin Grumei, Andrei Istodorescu
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Patent number: 10939371Abstract: A method for power save optimization includes a wireless station receiving a beacon frame from an Access Point (AP), wherein the beacon frame comprises a Traffic Indication Map (TIM) including an Association Identifier (AID) flag corresponding to the wireless station. The wireless station transmits to the AP, a first NULL frame with a Power Save (PS) flag cleared to represent an AWAKE state if the AID flag is TRUE, otherwise the PS flag is set to represent a DEEP SLEEP state. The wireless station receives at least a portion of a data from the AP in response to the AP receiving the first NULL frame during the AWAKE state. The wireless station transmits to the AP, a second NULL frame with the PS flag set to represent the DEEP SLEEP state in response to the wireless station receiving all of the data.Type: GrantFiled: January 31, 2019Date of Patent: March 2, 2021Assignee: NXP USA, Inc.Inventor: Doru Cristian Gucea
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Publication number: 20200382330Abstract: A mechanism is provided by which a hardware filter on a border router of a wireless personal area network is not overloaded by increasing the probability that the hardware filter will capture all the nodes not on the corresponding WPAN. Network addresses for nodes within a subnet are allocated to have the same multicast address hash value in order to permit router multicast filtering to occur within hardware. Hardware filtering thereby relieves the router processor from performing filtering tasks, reducing resource consumption and decreasing the time used to perform filtering. Embodiments provide this functionality by assigning a unique multicast filter register value to each subnet within a network and allocating network addresses associated with that multicast filter register value through either DHCP or SLAAC address generation.Type: ApplicationFiled: August 2, 2019Publication date: December 3, 2020Applicant: NXP USA, Inc.Inventor: Doru Cristian Gucea
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Publication number: 20200107260Abstract: A method for power save optimization includes a wireless station receiving a beacon frame from an Access Point (AP), wherein the beacon frame comprises a Traffic Indication Map (TIM) including an Association Identifier (AID) flag corresponding to the wireless station. The wireless station transmits to the AP, a first NULL frame with a Power Save (PS) flag cleared to represent an AWAKE state if the AID flag is TRUE, otherwise the PS flag is set to represent a DEEP SLEEP state. The wireless station receives at least a portion of a data from the AP in response to the AP receiving the first NULL frame during the AWAKE state. The wireless station transmits to the AP, a second NULL frame with the PS flag set to represent the DEEP SLEEP state in response to the wireless station receiving all of the data.Type: ApplicationFiled: January 31, 2019Publication date: April 2, 2020Inventor: Doru Cristian Gucea