Patents by Inventor Dosun Lee
Dosun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170110445Abstract: A semiconductor device having a chip stack and an interconnection terminal is provided. The chip stack includes a first semiconductor chip, a second semiconductor chip and a third semiconductor chip stacked on each other. The interconnection terminal is electrically coupled to the chip stack. The first semiconductor chip includes a first front surface and a first backside surface. The second semiconductor chip includes a second front surface, a second backside surface, a second circuit layer and a through-electrode which is electrically coupled to the second circuit layer and penetrates the second semiconductor chip. The third semiconductor chip includes a third front surface, a third backside surface opposite to the third front surface and a third circuit layer adjacent to the third front surface. The first front surface and the second front surface face each other. The third front surface and the second backside surface face each other.Type: ApplicationFiled: December 27, 2016Publication date: April 20, 2017Inventors: PIL-KYU KANG, Byung Lyul Park, Taeyeong Kim, Yeun-Sang Park, Dosun Lee, Ho-Jin Lee, Jinho Chun, JU-IL CHOI, Yi Koan Hong
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Patent number: 9530706Abstract: A semiconductor device having a chip stack and an interconnection terminal is provided. The chip stack includes a first semiconductor chip, a second semiconductor chip and a third semiconductor chip stacked on each other. The interconnection terminal is electrically coupled to the chip stack. The first semiconductor chip includes a first front surface and a first backside surface. The second semiconductor chip includes a second front surface, a second backside surface, a second circuit layer and a through-electrode which is electrically coupled to the second circuit layer and penetrates the second semiconductor chip. The third semiconductor chip includes a third front surface, a third backside surface opposite to the third front surface and a third circuit layer adjacent to the third front surface. The first front surface and the second front surface face each other. The third front surface and the second backside surface face each other.Type: GrantFiled: March 26, 2015Date of Patent: December 27, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Pil-Kyu Kang, Byung Lyul Park, Taeyeong Kim, Yeun-Sang Park, Dosun Lee, Ho-Jin Lee, Jinho Chun, Ju-il Choi, Yi Koan Hong
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Patent number: 9214374Abstract: A microelectronic device includes a substrate having at least one microelectronic component on a surface thereof, a conductive via electrode extending through the substrate, and a stress relief structure including a gap region therein extending into the surface of the substrate between the via electrode and the microelectronic component. The stress relief structure is spaced apart from the conductive via such that a portion of the substrate extends therebetween. Related devices and fabrication methods are also discussed.Type: GrantFiled: March 13, 2012Date of Patent: December 15, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Dosun Lee, Kiyoung Yun, Yeonglyeol Park, Gilheyun Choi, Kisoon Bae, Kwangjin Moon
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Patent number: 9153559Abstract: A semiconductor device may include a semiconductor substrate, a through via electrode, and a buffer. The through via electrode may extend through a thickness of the semiconductor substrate with the through via electrode surrounding an inner portion of the semiconductor substrate so that the inner portion of the semiconductor substrate may thus be isolated from the outer portion of the semiconductor substrate. The buffer may be in the inner portion of the semiconductor substrate with the through via electrode surrounding and spaced apart from the buffer. Related methods are also discussed.Type: GrantFiled: September 11, 2012Date of Patent: October 6, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Dosun Lee, Byung Lyul Park, Gilheyun Choi, Kwangjin Moon, Kunsang Park, Sukchul Bang, Seongmin Son
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Publication number: 20150279825Abstract: A semiconductor device having a chip stack and an interconnection terminal is provided. The chip stack includes a first semiconductor chip, a second semiconductor chip and a third semiconductor chip stacked on each other. The interconnection terminal is electrically coupled to the chip stack. The first semiconductor chip includes a first front surface and a first backside surface. The second semiconductor chip includes a second front surface, a second backside surface, a second circuit layer and a through-electrode which is electrically coupled to the second circuit layer and penetrates the second semiconductor chip. The third semiconductor chip includes a third front surface, a third backside surface opposite to the third front surface and a third circuit layer adjacent to the third front surface. The first front surface and the second front surface face each other. The third front surface and the second backside surface face each other.Type: ApplicationFiled: March 26, 2015Publication date: October 1, 2015Inventors: Pil-Kyu KANG, Byung Lyul PARK, Taeyeong KIM, Yeun-Sang PARK, Dosun LEE, Ho-Jin LEE, Jinho CHUN, Ju-il CHOI, Yi Koan HONG
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Patent number: 8872351Abstract: Provided are semiconductor devices with a through electrode and methods of fabricating the same. The methods may include forming a via hole at least partially penetrating a substrate, the via hole having an entrance provided on a top surface of the substrate, forming a via-insulating layer to cover conformally an inner surface of the via hole, forming a buffer layer on the via-insulating layer to cover conformally the via hole provided with the via-insulating layer, the buffer layer being formed of a material whose shrinkability is superior to the via-insulating layer, forming a through electrode to fill the via hole provided with the buffer layer, and recessing a bottom surface of the substrate to expose the through electrode.Type: GrantFiled: February 1, 2013Date of Patent: October 28, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Kwangjin Moon, SuKyoung Kim, Kunsang Park, Byung Lyul Park, Sukchul Bang, Jin Ho An, Kyu-Ha Lee, Dosun Lee, Gilheyun Choi
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Patent number: 8710650Abstract: Provided are semiconductor devices having through electrodes and methods of fabricating the same. The method includes providing a substrate including top and bottom surfaces facing each other, forming a hole and a gap extending from the top surface of the substrate toward the bottom surface of the substrate, the gap surrounding the hole and being shallower than the hole, filling the hole with an insulating material, forming a metal interconnection line on the top surface of the substrate on the insulating material, recessing the bottom surface of the substrate to expose the insulating material, removing the insulating material to expose the metal interconnection line via the hole, filling the hole with a conductive material to form a through electrode connected to the metal interconnection line, recessing the bottom surface of the substrate again to expose the gap, and forming a lower insulating layer on the bottom surface of the substrate.Type: GrantFiled: October 7, 2013Date of Patent: April 29, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Sukchul Bang, Kwangjin Moon, Byung Lyul Park, Dosun Lee, Deok-Young Jung, Gilheyun Choi
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Patent number: 8691692Abstract: Provided are a semiconductor chip and a method of manufacturing the same. The semiconductor chip includes a substrate having a first side and a second side facing each other, and a through electrode being disposed in a hole penetrating the substrate, wherein an opening surrounded by the through electrode is disposed in the hole, wherein the opening comprises a first end adjacent to the first side of the substrate and a second end adjacent to the second side of the substrate.Type: GrantFiled: August 14, 2013Date of Patent: April 8, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Dong-Chan Lim, Gilheyun Choi, Kwangjin Moon, Deok-Young Jung, Byung-Lyul Park, Dosun Lee
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Publication number: 20140035144Abstract: Provided are semiconductor devices having through electrodes and methods of fabricating the same. The method includes providing a substrate including top and bottom surfaces facing each other, forming a hole and a gap extending from the top surface of the substrate toward the bottom surface of the substrate, the gap surrounding the hole and being shallower than the hole, filling the hole with an insulating material, forming a metal interconnection line on the top surface of the substrate on the insulating material, recessing the bottom surface of the substrate to expose the insulating material, removing the insulating material to expose the metal interconnection line via the hole, filling the hole with a conductive material to form a through electrode connected to the metal interconnection line, recessing the bottom surface of the substrate again to expose the gap, and forming a lower insulating layer on the bottom surface of the substrate.Type: ApplicationFiled: October 7, 2013Publication date: February 6, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Sukchul Bang, Kwangjin Moon, Byung Lyul Park, Dosun Lee, Deok-Young Jung, Gilheyun Choi
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Publication number: 20130344695Abstract: Provided are a semiconductor chip and a method of manufacturing the same.Type: ApplicationFiled: August 14, 2013Publication date: December 26, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong-Chan Lim, Gilheyun Choi, Kwangjin Moon, Deok-Young Jung, Byung-Lyul Park, Dosun Lee
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Patent number: 8551860Abstract: Provided are semiconductor devices having through electrodes and methods of fabricating the same. The method includes providing a substrate including top and bottom surfaces facing each other, forming a hole and a gap extending from the top surface of the substrate toward the bottom surface of the substrate, the gap surrounding the hole and being shallower than the hole, filling the hole with an insulating material, forming a metal interconnection line on the top surface of the substrate on the insulating material, recessing the bottom surface of the substrate to expose the insulating material, removing the insulating material to expose the metal interconnection line via the hole, filling the hole with a conductive material to form a through electrode connected to the metal interconnection line, recessing the bottom surface of the substrate again to expose the gap, and forming a lower insulating layer on the bottom surface of the substrate.Type: GrantFiled: August 29, 2012Date of Patent: October 8, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Sukchul Bang, Kwangjin Moon, Byung Lyul Park, Dosun Lee, Deok-Young Jung, Gilheyun Choi
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Publication number: 20130127019Abstract: A semiconductor device may include a semiconductor substrate, a through via electrode, and a buffer. The through via electrode may extend through a thickness of the semiconductor substrate with the through via electrode surrounding an inner portion of the semiconductor substrate so that the inner portion of the semiconductor substrate may thus be isolated from the outer portion of the semiconductor substrate. The buffer may be in the inner portion of the semiconductor substrate with the through via electrode surrounding and spaced apart from the buffer. Related methods are also discussed.Type: ApplicationFiled: September 11, 2012Publication date: May 23, 2013Inventors: Dosun LEE, Byung Lyul Park, Gilheyun Choi, Kwangjin Moon, Kunsang Park, Sukchul Bang, Seongmin Son
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Publication number: 20130052794Abstract: Provided are semiconductor devices having through electrodes and methods of fabricating the same. The method includes providing a substrate including top and bottom surfaces facing each other, forming a hole and a gap extending from the top surface of the substrate toward the bottom surface of the substrate, the gap surrounding the hole and being shallower than the hole, filling the hole with an insulating material, forming a metal interconnection line on the top surface of the substrate on the insulating material, recessing the bottom surface of the substrate to expose the insulating material, removing the insulating material to expose the metal interconnection line via the hole, filling the hole with a conductive material to form a through electrode connected to the metal interconnection line, recessing the bottom surface of the substrate again to expose the gap, and forming a lower insulating layer on the bottom surface of the substrate.Type: ApplicationFiled: August 29, 2012Publication date: February 28, 2013Inventors: Sukchul Bang, Kwangjin Moon, Byung Lyul Park, Dosun Lee, Deok-Young Jung, Gilheyun Choi
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Publication number: 20120292746Abstract: A microelectronic device includes a substrate having at least one microelectronic component on a surface thereof, a conductive via electrode extending through the substrate, and a stress relief structure including a gap region therein extending into the surface of the substrate between the via electrode and the microelectronic component. The stress relief structure is spaced apart from the conductive via such that a portion of the substrate extends therebetween. Related devices and fabrication methods are also discussed.Type: ApplicationFiled: March 13, 2012Publication date: November 22, 2012Inventors: Dosun LEE, Kiyoung YUN, Yeonglyeol PARK, Gilheyun CHOI, Kisoon BAE, Kwangjin MOON
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Publication number: 20120119376Abstract: Provided are a semiconductor chip and a method of manufacturing the same.Type: ApplicationFiled: November 4, 2011Publication date: May 17, 2012Inventors: Dong-Chan Lim, Gilheyun Choi, Kwangjin Moon, Deok-Young Jung, Byung-Lyul Park, Dosun Lee