Patents by Inventor Doug Burger

Doug Burger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hardware and Operating System Support For Persistent Memory On A Memory Bus
    Publication number: 20100106895
    Abstract: Implementations of a file system that is supported by a non-volatile memory that is directly connected to a memory bus, and placed side by side with a dynamic random access memory (DRAM), are described.
    Type: Application
    Filed: July 15, 2009
    Publication date: April 29, 2010
    Applicant: Microsoft Corporation
    Inventors: Jeremy P. Condit, Edmund B. Nightingale, Benjamin Lee, Engin Ipek, Christopher Frost, Doug Burger
  • Non-uniform cache apparatus, systems, and methods
    Patent number: 6965969
    Abstract: An apparatus or system may comprises cache control circuitry coupled to a processor, and a plurality of independently accessible memory banks (228) coupled to the cache control circuitry. Some of the banks may have non-uniform latencies, organized into two or more spread bank sets (246). A method may include accessing data in the banks, wherein selected banks are closer to the cache control circuitry and/or processor than others, and migrating a first datum (445) to a closer bank from a further bank upon determining that the first datum is accessed more frequently than a second datum, which may be migrated to the further bank (451).
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: November 15, 2005
    Assignee: Board of Regents, The University of Texas Systems
    Inventors: Doug Burger, Stephen W. Keckler, Changkyu Kim
  • Non-uniform cache apparatus, systems, and methods
    Publication number: 20050132140
    Abstract: An apparatus or system may comprises cache control circuitry coupled to a processor, and a plurality of independently accessible memory banks (228) coupled to the cache control circuitry. Some of the banks may have non-uniform latencies, organized into two or more spread bank sets (246). A method may include accessing data in the banks, wherein selected banks are closer to the cache control circuitry and/or processor than others, and migrating a first datum (445) to a closer bank from a further bank upon determining that the first datum is accessed more frequently than a second datum, which may be migrated to the further bank (451).
    Type: Application
    Filed: October 8, 2004
    Publication date: June 16, 2005
    Inventors: Doug Burger, Stephen Keckler, Changkyu Kim