Patents by Inventor Doug Caldwell

Doug Caldwell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6645344
    Abstract: A backplane assembly for a substrate processing system that is selectively configurable to provide an effective thermal contact with substrates of differing sizes. The backplane assembly includes a backplane base installed in a vacuum chamber of the substrate processing system and plural faceplates which are removably mountable to the backplane base. The backplane assembly is operable for regulating the temperature of the substrate and include elements that promote the efficient transfer of heat between the backplane base and the faceplate to perform the temperature regulation during processing. Each of the faceplates has a contact surface dimensioned and configured to engage a correspondingly dimensioned and/or configured type of substrate. The faceplates are readily demountable from the backplane base for exchange to accommodate a change in the dimension and/or configuration of the substrates being processed by the substrate processing system without removing the backplane base from the vacuum chamber.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: November 11, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Doug Caldwell, Albert Garcia, Jr., Thomas J. Horback, Michael James Lombardi, Mark McNicholas, Dean Mize, Gon Wang
  • Publication number: 20020172764
    Abstract: A backplane assembly for a substrate processing system that is selectively configurable to provide an effective thermal contact with substrates of differing sizes. The backplane assembly includes a backplane base installed in a vacuum chamber of the substrate processing system and plural faceplates which are removably mountable to the backplane base. The backplane assembly is operable for regulating the temperature of the substrate and include elements that promote the efficient transfer of heat between the backplane base and the faceplate to perform the temperature regulation during processing. Each of the faceplates has a contact surface dimensioned and configured to engage a correspondingly dimensioned and/or configured type of substrate. The faceplates are readily demountable from the backplane base for exchange to accommodate a change in the dimension and/or configuration of the substrates being processed by the substrate processing system without removing the backplane base from the vacuum chamber.
    Type: Application
    Filed: May 18, 2001
    Publication date: November 21, 2002
    Applicant: Tokyo Electron Limited of TBS Broadcast Center
    Inventors: Doug Caldwell, Albert Garcia, Thomas J. Horback, Michael James Lombardi, Mark McNicholas, Dean Mize, Gon Wang
  • Patent number: 6156164
    Abstract: Damage to a gallium arsenide substrate during plasma ignition for PVD processing is avoided by a virtual shutter, which provides the functions without the disadvantages of a mechanical shutter to minimize the density of high energy particles created during plasma ignition from reaching the GaAs substrate.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: December 5, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Jason Smolanoff, Doug Caldwell, Glyn Reynolds
  • Patent number: 6117279
    Abstract: An ionized physical vapor deposition method and apparatus are provided which employs a magnetron magnetic field produced by cathode magnet structure behind a sputtering target to produce a main sputtering plasma, and an RF inductively coupled field produced by an RF coil outside of and surrounding the vacuum of the chamber to produce a secondary plasma in the chamber between the target and a substrate to ionize sputtered material passing from the target to the substrate so that the sputtered material can be electrically or magnetically steered to arrive at the substrate at right angles. A circumferentially interrupted shield or shield structure in the chamber protects the window from material deposits. A low pass LC filter circuit allows the shield to float relative to the RF voltage but to dissipate DC potential on the shield.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: September 12, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Jason Smolanoff, Doug Caldwell, Jim Zibrida, Bruce Gittleman, Thomas J. Licata