Patents by Inventor Doug Hawks

Doug Hawks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260018539
    Abstract: A three-dimensional integrated circuit (3D IC) including a first die, a second die, a bonding layer between the first and second dies. The bonding layer bonds the first and second dies. The 3D IC also includes a chipping and delamination barrier (CDB) extending across the first die, the bonding layer, and the second die.
    Type: Application
    Filed: September 23, 2025
    Publication date: January 15, 2026
    Inventors: Tran Kononova, Kouassi Sebastien Kouassi, Doug Hawks
  • Publication number: 20260004417
    Abstract: Systems, methods, and computer program products for identifying defective dies at a die processing service with machine learning are provided. A training dataset comprising training images taken by one or more cameras at a tape and reel machine is provided to train a machine learning system. The training images include images of dies having integrated circuits. Positions of solder points are determined in each training image. The positions of solder points in each training image are aligned with positions of solder points in other training images to generate aligned positions of the solder points. The aligned positions are clustered into multiple clusters. A centroid position for each cluster is determined, where the centroid positions correspond to locations of the solder points across all images. The centroid positions are transmitted to the machine learning system in a production environment and are used to identify images with defective dies.
    Type: Application
    Filed: July 1, 2024
    Publication date: January 1, 2026
    Inventors: Shweta Deora, John Gao, Doug Hawks, Zhaojin Wen, Tuan Lam
  • Publication number: 20250363616
    Abstract: Systems, methods, and computer program products for training and using a machine learning system to identify die mispicks in images of wafers. A machine learning system is trained on a training dataset of historical image data from a tape and reel machine. The historical image data includes images of wafers comprising dies having integrated circuits. The image data is propagated through multiple layers of a neural network in the machine learning system until the neural network is trained to identify die mispicks from the image data. The training dataset also includes synthetic data that is generated from die mispicks in historical image data that are identified using text log files indicating die processing errors. Once trained, the machine learning system is communicatively connected to a tape and reel machine to identify die mispicks in real-time.
    Type: Application
    Filed: May 21, 2024
    Publication date: November 27, 2025
    Inventors: Shweta Deora, John Gao, Doug Hawks, Zhaojin Wen, Tuan Lam
  • Publication number: 20090315163
    Abstract: Disclosed are semiconductor die packages comprising flexible modules having passive components, with the flexible modules and one or more semiconductor dice disposed in a stacked relationship, systems using the same, and methods of making the same. In one exemplary package embodiment, one or more semiconductor dice are disposed on a leadframe that is disposed in a stacked relationship with the flexible module. In another embodiment, one or more semiconductor dice are attached to a surface of a flexible module.
    Type: Application
    Filed: June 20, 2008
    Publication date: December 24, 2009
    Inventors: Terry Johnson, Doug Hawks, Yong Liu
  • Publication number: 20090315162
    Abstract: Semiconductor die packages, methods of making said packages, and systems using said packages are disclosed. An exemplary package comprises at least one semiconductor die disposed on one surface of a leadframe and electrically coupled to at least one conductive region of the leadframe, and at least one passive electrical component disposed on the other surface of a leadframe and electrically coupled to at least one conductive region of the leadframe. Molding material is disposed over the at least one passive electrical component to provide a molded passive component.
    Type: Application
    Filed: June 20, 2008
    Publication date: December 24, 2009
    Inventors: Yong Liu, Yumin Liu, Terry Johnson, Doug Hawks