Patents by Inventor Doug Piasecki

Doug Piasecki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6985101
    Abstract: Open loop common mode driver for switched capacitor input to SAR. A method for controlling the operation of a SAR conversion cycle. The method includes the steps of first initiating the SAR conversion cycle by connecting one side of a plurality of capacitors in a capacitor array to a first capacitor reference voltage and the other side of the plurality of capacitors to the input of a comparator. This is followed by the step of sequentially switching in a plurality of compare cycles the one side of a select one or ones of the capacitors to a second capacitor reference voltage to change the voltage on the input of the comparator. Then, a compare operation is initiated after initiation of each compare cycle to compare the value on the input of the comparator with a compare reference voltage after a predetermined settling time has elapsed from the beginning of the initiation of each compare cycle.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: January 10, 2006
    Assignee: Silicon Labs CP, Inc.
    Inventors: Ka Leung, Doug Piasecki
  • Patent number: 6956520
    Abstract: Open loop common mode driver for switched capacitor input to SAR. A method for selectively switching capacitors in a SAR capacitor array that have a common plate thereof interfaced to the input of a comparator. The method includes the step of first initiating a SAR compare cycle. Then. the other plates the capacitors switched such that they are disposed at either a first capacitor reference voltage or a second capacitor reference voltage in a combination and sequence of switching operations defined by a successive approximation search algorithm. Each switching operation in the sequence requires, after the step of switching, a comparison of the voltage input to the comparator with a compare reference voltage after a predetermined settling time from the time the capacitor combination for the switching operation has been switched. The duration of the settling time is controlled for each of the switching operations in the sequence such that at least two of the durations are different.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: October 18, 2005
    Assignee: Silicon Labs CP, Inc.
    Inventors: Ka Y. Leung, Doug Piasecki
  • Publication number: 20040246162
    Abstract: Open loop common mode driver for switched capacitor input to SAR. A method for selectively switching capacitors in a SAR capacitor array that have a common plate thereof interfaced to the input of a comparator. The method includes the step of first initiating a SAR compare cycle. Then the other plates the capacitors switched such that they are disposed at either a first capacitor reference voltage or a second capacitor reference voltage in a combination and sequence of switching operations defined by a successive approximation search algorithm. Each switching operation in the sequence requires, after the step of switching, a comparison of the voltage input to the comparator with a compare reference voltage after a predetermined settling time from the time the capacitor combination for the switching operation has been switched. The duration of the settling time is controlled for each of the switching operations in the sequence such that at least two of the durations are different.
    Type: Application
    Filed: December 12, 2003
    Publication date: December 9, 2004
    Inventors: Ka Y. Leung, Doug Piasecki
  • Publication number: 20040246159
    Abstract: Open loop common mode driver for switched capacitor input to SAR. A method for controlling the operation of a SAR conversion cycle. The method includes the steps of first initiating the SAR conversion cycle by connecting one side of a plurality of capacitors in a capacitor array to a first capacitor reference voltage and the other side of the plurality of capacitors to the input of a comparator. This is followed by the step of sequentially switching in a plurality of compare cycles the one side of a select one or ones of the capacitors to a second capacitor reference voltage to change the voltage on the input of the comparator. Then, a compare operation is initiated after initiation of each compare cycle to compare the value on the input of the comparator with a compare reference voltage after a predetermined settling time has elapsed from the beginning of the initiation of each compare cycle.
    Type: Application
    Filed: December 12, 2003
    Publication date: December 9, 2004
    Inventors: Ka Y. Leung, Doug Piasecki