Abstract: An RF interconnect between an airline circuit including a dielectric substrate having a conductor trace formed on a first substrate surface and an RF circuit separated from the airline circuit by a separation distance. The RF interconnect includes a compressible conductor structure having an uncompressed length exceeding the separation distance, and a dielectric sleeve structure surrounding at least a portion of the uncompressed length of the compressible conductor structure. The RF interconnect structure is disposed between the substrate and the RF circuit such that the compressible conductor is placed under compression between the substrate and the RF circuit. Examples of the RF circuit include a vertical coaxial transmission line or a grounded coplanar waveguide circuit disposed in parallel with the airline circuit.

Abstract: An RF interconnect between a rectangular coaxial transmission line including a coaxial center conductor and a dielectric structure with a rectilinear cross-sectional configuration fitted around the coaxial center conductor and an RF circuit separated from the airline circuit by a separation distance. The RF interconnect includes a compressible conductor structure having an uncompressed length exceeding the separation distance, and a dielectric sleeve structure surrounding at least a portion of the uncompressed length of the compressible conductor structure. The RF interconnect structure is disposed between the rectangular coaxial transmission line and the RF circuit such that the compressible conductor is placed under compression between the substrate and the RF circuit. Examples of the RF circuit include a vertical coaxial transmission line or a grounded coplanar waveguide circuit disposed in parallel with the center conductor of the rectangular coaxial transmission line.

Abstract: The hermetic package (10) has an interior recess (46) for receipt of a semiconductor chip. The recess is square and set at 45.degree. with respect to the rectangular exterior of the package. The ceramic layers which make up the package carry conductive planes thereof with the interior opening stepped to provide connection points. The lowest layer having a chip opening therein may be left out of the assembly to provide a shallower chip opening recess.