Abstract: A computer-aided design (CAD) system may support anti-constraint configuration and enforcement for CAD models that represent physical objects. Anti-constraints may specify given constraints not to be applied for components of the CAD model, and the CAD system may update components of the CAD model without applying the constraints specified in anti-constraints applicable to the CAD model components.

Abstract: A shared ledger operated by a group of network participants according to a set of consensus rules manages and resolves subrogation claims between a clamant and a defendant with arbitration. Evidence regarding the value of the subrogation claim is sent to the shared ledger by the parties to the subrogation claim such as sending data to a smart contract deployed on the shared ledger. The parties to the subrogation claim or entities that are not parties to the subrogation claim may broadcast data relating to fault to the blockchain. The data relating to fault may be evaluated by the parties or entities acting on the parties' behalf to determine fault. A fault determination may be broadcast to the blockchain based upon the analysis of the data relating to fault. Once the claim is resolved, arbitrator may release funds on the chain to the prevailing party or may accept confirmation that any payments have been made between the parties off-chain.

Abstract: In a hybrid computing system including at least one analog processor and at least one digital processor an embedded problem is repeatedly run or executed on the analog processor(s) to generate a first plurality of candidate solutions to the computational problem, the candidate solutions are returned to the digital processor(s) which determine a value for at least one statistical feature of the candidate solutions, at least one programmable parameter of the plurality of analog devices in the analog processor(s) is adjusted to at least partially compensate for deviations from an expected value of the at least one statistical feature, the expected value of the at least one statistical feature inferred from the structure of the embedded problem, the embedded problem is again repeatedly run or executed on the analog processor(s) to generate a second plurality of candidate solutions to the computational problem.

Abstract: A computational method via a hybrid processor comprising an analog processor and a digital processor includes determining a first classical spin configuration via the digital processor, determining preparatory biases toward the first classical spin configuration, programming an Ising problem and the preparatory biases in the analog processor via the digital processor, evolving the analog processor in a first direction, latching the state of the analog processor for a first dwell time, programming the analog processor to remove the preparatory biases via the digital processor, determining a tunneling energy via the digital processor, determining a second dwell time via the digital processor, evolving the analog processor in a second direction until the analog processor reaches the tunneling energy, and evolving the analog processor in the first direction until the analog processor reaches a second classical spin configuration.

Abstract: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

Abstract: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

Abstract: A method and system for computer aided design, (e.g., of products and other items), are disclosed herein. The method may include receiving a CAD model having a behavior defined by a plurality of relationships, receiving a user operation to edit a seed feature in the CAD model, and identifying a set of problem relationships from the plurality of relationships, wherein the set of problem relationships prevent implementation of the received user operation to the received CAD model. A category for each relationship in the set of problem relationships is selected. The behavior of the CAD model is reconfigured based on the selected category for each problem relationship by retaining any user-defined relationships, optionally retaining any optional relationships, and ignoring any relaxed relationships. The user operation is then performed according to the reconfigured behavior to produce a modified CAD model.

Abstract: Methods and systems are provided for fabricating a composite structure. In one example, the composite structure may include a honeycomb core sandwiched between face sheets. An edge of the honeycomb core may be abraded and a top face sheet may be perforated. As such, a likelihood of delamination of the composite structure during a curing step may be reduced.

Abstract: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

Abstract: Methods and systems are provided for fabricating a composite structure. In one example, the composite structure may include a honeycomb core sandwiched between face sheets. An edge of the honeycomb core may be abraded and a top face sheet may be perforated. As such, a likelihood of delamination of the composite structure during a curing step may be reduced.

Abstract: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

Abstract: A computer-aided design (CAD) system may support anti-constraint configuration and enforcement for CAD models that represent physical objects. Anti-constraints may specify given constraints not to be applied for components of the CAD model, and the CAD system may update components of the CAD model without applying the constraints specified in anti-constraints applicable to the CAD model components.

Abstract: In a hybrid computing system including at least one analog processor and at least one digital processor an embedded problem is repeatedly run or executed on the analog processor(s) to generate a first plurality of candidate solutions to the computational problem, the candidate solutions are returned to the digital processor(s) which determine a value for at least one statistical feature of the candidate solutions, at least one programmable parameter of the plurality of analog devices in the analog processor(s) is adjusted to at least partially compensate for deviations from an expected value of the at least one statistical feature, the expected value of the at least one statistical feature inferred from the structure of the embedded problem, the embedded problem is again repeatedly run or executed on the analog processor(s) to generate a second plurality of candidate solutions to the computational problem.

Abstract: A computational method via a hybrid processor comprising an analog processor and a digital processor includes determining a first classical spin configuration via the digital processor, determining preparatory biases toward the first classical spin configuration, programming an Ising problem and the preparatory biases in the analog processor via the digital processor, evolving the analog processor in a first direction, latching the state of the analog processor for a first dwell time, programming the analog processor to remove the preparatory biases via the digital processor, determining a tunneling energy via the digital processor, determining a second dwell time via the digital processor, evolving the analog processor in a second direction until the analog processor reaches the tunneling energy, and evolving the analog processor in the first direction until the analog processor reaches a second classical spin configuration.

Abstract: A computational method via a hybrid processor comprising an analog processor and a digital processor includes determining a first classical spin configuration via the digital processor, determining preparatory biases toward the first classical spin configuration, programming an Ising problem and the preparatory biases in the analog processor via the digital processor, evolving the analog processor in a first direction, latching the state of the analog processor for a first dwell time, programming the analog processor to remove the preparatory biases via the digital processor, determining a tunneling energy via the digital processor, determining a second dwell time via the digital processor, evolving the analog processor in a second direction until the analog processor reaches the tunneling energy, and evolving the analog processor in the first direction until the analog processor reaches a second classical spin configuration.

Abstract: Methods and systems are provided for fabricating a composite structure. In one example, the composite structure may include a honeycomb core sandwiched between face sheets. An edge of the honeycomb core may be abraded and a top face sheet may be perforated. As such, a likelihood of delamination of the composite structure during a curing step may be reduced.

Abstract: A hybrid computer for generating samples employs a digital computer operable to perform post-processing. An analog computer may be communicatively coupled to the digital computer. The analog computer may be operable to return one or more samples corresponding to low-energy configurations of a Hamiltonian. Methods of generating samples from a quantum Boltzmann distribution to train a Quantum Boltzmann Machine, and from a classical Boltzmann distribution to train a Restricted Boltzmann Machine, are also taught. Computational systems and methods permit processing problems having size and/or connectivity greater than, and/or at least not fully provided by, a working graph of an analog processor.

Abstract: Topologies for analog computing systems are provided. Qubits in the topology are grouped into cells, and cells are coupled to adjacent cells by inter-cell couplers. At least some cells are coupled to non-adjacent cells via long-range couplers. Long-range couplers may be arranged into coverings so that certain sets of qubits within a covering region may be coupled with a reduced number of couplers. Each cell within a covering region without a long-range coupler may be proximate to a cell with a long range coupler so that each cell within the covering region is no more than a certain coupling distance away from a long-range coupler. Long-range couplers may couple over a greater physical distance than inter-cell couplers. Long-range couplers may couple to qubits over a larger coupling region, and may extend across multiple crossing regions between qubits.

Abstract: Disclosed are various embodiments for using air pressure to increase or decrease the force of static friction between an item and the surface of a conveyance system. The conveyance system can include a track and a conveyor segment affixed to the track. The conveyor segment can include an air permeable surface on which an item can be placed. Mounted underneath the air permeable surface is an air displacement device.

Abstract: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.