Abstract: This invention is directed toward a mixing vessel and mixer where the design of the mixer and mixing vessel allow the mixer to reach all the cracks and crevices of the mixing vessel. The mixer also has two opposing openings with mixing vanes that facilitate turbulence and blending through a strong centrifugal flow. The mixer has unbroken or minimally broken surfaces for grinding/shearing lumps into a smooth, lump-free paste.

Abstract: A power amplification circuit having three modes of operation and a single switch is disclosed. Only one switch is used to control three different load impedance levels, one load impedance level for each mode of operation. The remaining “switching” results from selectively biasing each power amplification path by turning ON or OFF amplifiers. A series L-C and a switch are used to control the load impedance. Additional modes of operation may also be created without requiring any additional switch. Further, multiple modes of operation may be implemented using no switches.

Abstract: A power amplification circuit having three modes of operation and a single switch is disclosed. Only one switch is used to control three different load impedance levels, one load impedance level for each mode of operation. The remaining “switching” results from selectively biasing each power amplification path by turning ON or OFF amplifiers. A series L-C and a switch are used to control the load impedance. Additional modes of operation may also be created without requiring any additional switch. Further, multiple modes of operation may be implemented using no switches.

Abstract: The present invention is a parallel RF amplifier circuit that selects between a high power side (HPS) and a low power side (LPS), depending upon output power. A chain matching network couples an LPS output to an HPS output for improved efficiency at lower output power. When the HPS is selected, the LPS output is disabled, and when the LPS is selected, the HPS output is disabled When the HPS is selected, large signal voltage swings from the collector of the HPS amplifier may be multiplied through the chain matching network, and may cause negative voltage swings at the LPS collector, which may degrade linearity and efficiency of the HPS amplifier by driving currents into the disabled LPS amplifier. Therefore, the present invention includes LPS bias circuitry to minimize impacts of negative voltage swings at the LPS output.

Abstract: A method is provided for large signal modeling of a field effect transistor. The method includes establishing a small signal model for the transistor, such model having a gate-source capacitance Cgs and a drain-gate capacitance Cdg, both being functions of a gate-source voltage Vgs and a drain-source voltage Vds. The s-parameters of the transistor are measured and curve fitting is applied to the measured s-parameters to establish small signal model parameters. The small signal model parameters include gate-source capacitance Cgs as a function of Vgs and Vds and gate-drain capacitance Cdg as a function of Vgs and Vds. Curve fitting is applied to Cgs and Cdg to establish large signal gate charge fitting parameters. The established large signal gate charge fitting parameters are used to express a gate-source charge Qgs and a gate-drain charge Qgd as functions of Vgs and a gate-drain voltage Vgd in a large signal model for the transistor.

Abstract: A transistor device having a plurality of transistor cells. Each one of the cells has a control electrode for controlling a flow of carriers through a semiconductor. The device has an input node. A plurality of filters is provided. Each one of the filters is coupled between the input node and a corresponding one of the control electrodes of the plurality of transistor cells. In one embodiment of the invention, pairs of the control electrodes are connected to a common region and wherein each one of the filters is coupled between the input node and a corresponding one of the common regions. The semiconductor provides a common active region for the plurality of transistor cells.