Patents by Inventor Douglas Bryce

Douglas Bryce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230247975
    Abstract: A tip-up system is disclosed herein. The tip-up system includes a base, a telescopic stand, a paddle fastener and a paddle. The tip-up system improves the process of finding a point of balance of the paddle of the tip-up stand. Particularly, the paddle includes a horizontal cavity and a pivot bar attached therewithin. The paddle pivots between a balanced position and a tipped position via the pivot bar. The pivot bar is movable within the horizontal cavity to allow a user to adjust a balance point of the paddle and thus find the correct point of balance for the paddle when in use with a fishing line and hook.
    Type: Application
    Filed: February 10, 2022
    Publication date: August 10, 2023
    Inventors: Gerald Douglas Bryce Brown, Steven Henry Norman Draker
  • Patent number: 11700841
    Abstract: A tip-up system includes a base, a telescopic stand, a paddle fastener and a paddle. The tip-up system improves the process of finding a point of balance of the paddle of the tip-up stand. Particularly, the paddle includes a horizontal cavity and a pivot bar attached therewithin. The paddle pivots between a balanced position and a tipped position via the pivot bar. The pivot bar is movable within the horizontal cavity to allow a user to adjust a balance point of the paddle and thus find the correct point of balance for the paddle when in use with a fishing line and hook.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: July 18, 2023
    Inventors: Gerald Douglas Bryce Brown, Steven Henry Norman Draker
  • Patent number: 9735773
    Abstract: Systems and techniques detecting a reverse current are disclosed. An apparatus comprises a switching circuit coupled to a load and a reference node. The switching circuit may be capable of conducting a reverse current from the reference node to the load when a voltage at the load is lower than a voltage at the reference node. A voltage source has a first terminal coupled to the load, a second terminal configured to follow a voltage at the load, and produces a voltage proportional to a voltage drop across the switching circuit. A comparator circuit is coupled to compare a voltage at the second terminal of the voltage source to the voltage at the reference node and configured to indicate when the reverse current has a magnitude greater than a predetermined threshold.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: August 15, 2017
    Assignee: Allegro Microsystems, LLC
    Inventors: James McIntosh, Robert D. Christie, Douglas Bryce, Walter Morrison Stewart Wilson
  • Publication number: 20150311894
    Abstract: Systems and techniques detecting a reverse current are disclosed. An apparatus comprises a switching circuit coupled to a load and a reference node. The switching circuit may be capable of conducting a reverse current from the reference node to the load when a voltage at the load is lower than a voltage at the reference node. A voltage source has a first terminal coupled to the load, a second terminal configured to follow a voltage at the load, and produces a voltage proportional to a voltage drop across the switching circuit. A comparator circuit is coupled to compare a voltage at the second terminal of the voltage source to the voltage at the reference node and configured to indicate when the reverse current has a magnitude greater than a predetermined threshold.
    Type: Application
    Filed: April 29, 2014
    Publication date: October 29, 2015
    Applicant: Allegro Microsystems, LLC
    Inventors: James McIntosh, Robert D. Christie, Douglas Bryce, Walter Morrison Stewart Wilson
  • Patent number: 8239643
    Abstract: In a nonvolatile memory with block management system, critical data such as control data for the block management system is maintained in duplicates. Various methods are described for robustly writing and reading two copies of critical data in multi-state memory. In another aspect of the invention, a preemptive garbage collection on memory block containing control data avoids an undesirable situation where a large number of such memory blocks need be garbage collected at the same time.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: August 7, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Sergey Anatolievich Gorobets, Alan Douglas Bryce, Alan David Bennett
  • Patent number: 8117381
    Abstract: The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: February 14, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Carlos J. Gonzalez, Alan Douglas Bryce, Sergey Anatolievich Gorobets, Alan David Bennett
  • Publication number: 20120017038
    Abstract: In a nonvolatile memory with block management system, critical data such as control data for the block management system is maintained in duplicates. Various methods are described for robustly writing and reading two copies of critical data in multi-state memory. In another aspect of the invention, a preemptive garbage collection on memory block containing control data avoids an undesirable situation where a large number of such memory blocks need be garbage collected at the same time.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 19, 2012
    Inventors: Sergey Anatolievich Gorobets, Alan Douglas Bryce, Alan David Bennett
  • Patent number: 8051257
    Abstract: In a nonvolatile memory with block management system, critical data such as control data for the block management system is maintained in duplicates. Various methods are described for robustly writing and reading two copies of critical data in multi-state memory. In another aspect of the invention, a preemptive garbage collection on memory block containing control data avoids an undesirable situation where a large number of such memory blocks need be garbage collected at the same time.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: November 1, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Sergey Anatolievich Gorobets, Alan Douglas Bryce, Alan David Bennett
  • Publication number: 20110191530
    Abstract: The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.
    Type: Application
    Filed: April 11, 2011
    Publication date: August 4, 2011
    Inventors: Carlos J. Gonzalez, Alan Douglas Bryce, Sergey Anatolievich Gorobets, Alan David Bennett
  • Patent number: 7970985
    Abstract: The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: June 28, 2011
    Assignee: SanDisk Corporation
    Inventors: Carlos J. Gonzalez, Alan Douglas Bryce, Sergey Anatolievich Gorobets, Alan David Bennett
  • Patent number: 7783845
    Abstract: The present invention presents a number of improvements for managing erase processes in non-volatile memory. Such memory systems typically manage the memory by logically organize the basic unit of physical erase (erase block) into composite logical groupings (meta-blocks or logical group), where an erase block generally consists of a number of sectors. When an erase command is received, the specified sectors are checked against the memory system's control data. If the specified sectors span any full logical grouping, the full logical groupings can each be treated as a whole and erased according to one process (such as performing a true, physical erase), while other sectors are “logically” erased at the sector level by standard techniques.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: August 24, 2010
    Assignee: SanDisk Corporation
    Inventors: Alan David Bennett, Alan Douglas Bryce, Sergey Anatolievich Gorobets
  • Publication number: 20090292944
    Abstract: The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.
    Type: Application
    Filed: July 30, 2009
    Publication date: November 26, 2009
    Inventors: Carlos J. Gonzalez, Alan Douglas Bryce, Sergey Anatolievich Gorobets, Alan David Bennett
  • Patent number: 7624239
    Abstract: The present invention presents a number of improvements for managing erase processes in non-volatile memory. Such memory systems typically manage the memory by logically organize the basic unit of physical erase (erase block) into composite logical groupings (meta-blocks or logical group), where an erase block generally consists of a number of sectors. When an erase command is received, the specified sectors are checked against the memory system's control data. If the specified sectors span any full logical grouping, the full logical groupings can each be treated as a whole and erased according to one process (such as performing a true, physical erase), while other sectors are “logically” erased at the sector level by standard techniques.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: November 24, 2009
    Assignee: SanDisk Corporation
    Inventors: Alan David Bennett, Alan Douglas Bryce, Sergey Anatolievich Gorobets
  • Patent number: 7139864
    Abstract: A non-volatile memory system is organized in physical groups of physical memory locations. Each physical group (metablock) is erasable as a unit and can be used to store a logical group of data. A memory management system allows for update of a logical group of data by allocating a metablock dedicated to recording the update data of the logical group. The update metablock records update data in the order received and has no restriction on whether the recording is in the correct logical order as originally stored (sequential) or not (chaotic). Eventually the update metablock is closed to further recording. One of several processes will take place, but will ultimately end up with a fully filled metablock in the correct order which replaces the original metablock. In the chaotic case, directory data is maintained in the non-volatile memory in a manner that is conducive to frequent updates. The system supports multiple logical groups being updated concurrently.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: November 21, 2006
    Assignee: SanDisk Corporation
    Inventors: Alan David Bennett, Alan Douglas Bryce, Sergey Gorobets, Alan Welsh Sinclair, Peter John Smith
  • Publication number: 20050144365
    Abstract: In a nonvolatile memory with block management system, critical data such as control data for the block management system is maintained in duplicates. Various methods are described for robustly writing and reading two copies of critical data in multi-state memory. In another aspect of the invention, a preemptive garbage collection on memory block containing control data avoids an undesirable situation where a large number of such memory blocks need be garbage collected at the same time.
    Type: Application
    Filed: August 13, 2004
    Publication date: June 30, 2005
    Inventors: Sergey Anatolievich Gorobets, Alan Douglas Bryce, Alan David Bennett