Abstract: An improved maximum likelihood detector with a trellis having three or more dimensions is disclosed. Trellis dimensions include a state dimension and a sample dimension found in a conventional Viterbi trellis. The additional dimensions are added to the trellis for adaptation to additional parameters that are responsive to channel variations such as pulse shape, amplitude, timing, media velocity and media tension. A set of rules govern most likely paths moving along the additional dimensions. In the preferred embodiment, a most likely path may transition up to a predetermined maximum number of unit lengths along each additional dimension per unit length movement in the sample dimension. Once a path has changed values in any given additional dimension then it must dwell at that value for a minimum number of samples.

Abstract: A circuit and a method of operation for detecting a bit sequence from an analog waveform representing the bit sequence and at least one other parameter associated with the analog waveform are disclosed. Detection includes digitizing the analog waveform and at least one other parameter using at least one analog to digital converter. The resulting digital numbers are synchronized in time by a plurality of registers so that the outputs of the registers always change simultaneously. The outputs of the registers are concatenated to form an address. The address is input into a read-only memory that looks up a most likely bit detected that has been predetermined for that address and stored in the read-only memory. The bits read from the read-only memory by the addresses are output periodically to form the bit sequence.

Abstract: A circuit and a method of operation for detecting a bit sequence from an analog waveform representing the bit sequence and at least one other parameter associated with the analog waveform are disclosed. Detection includes digitizing the analog waveform and at least one other parameter using at least one analog to digital converter. The resulting digital numbers are synchronized in time by a plurality of registers so that the outputs of the registers always change simultaneously. The outputs of the registers are concatenated to form an address. The address is input into a read-only memory that looks up a most likely bit detected that has been predetermined for that address and stored in the read-only memory. The bits read from the read-only memory by the addresses are output periodically to form the bit sequence.

Abstract: It is difficult to read data from curved helical data tracks in a helical scan tape drive. Curved helical tracks can be caused by improper tape tension, tape damage, tape path misalignment, tape head offset between different head systems, and debris. The present invention solves the problem of recovering data from curved helical tracks by providing a table of different curve offset signals. Each curve offset signal represents a curve track profile of a typical curved track. The position of the helical read head reading a curved data track is controlled as a function of one of the curve offset signals such that the read head is positioned properly with respect to the helical data track to provide a proper read back signal. The curve offset signals are selected one at a time to control the position of the helical read head until the helical read head provides a proper read back signal.