Patents by Inventor Douglas Covelli

Douglas Covelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070005932
    Abstract: Embodiments of memory management in a multiprocessor system are disclosed. Embodiments include a system and method for maintaining translation lookaside buffer (TLB) consistency or coherency in a multiprocessor system. A coalescing component receives from a host system a list of TLB pages to be invalidated or purged. The coalescing component uses information of the TLB invalidation broadcast mechanism in use by a processor in the multiprocessor system to evaluate the list of TLB pages. The coalescing component generates a single TLB invalidation message with a variable invalidation range to cover multiple TLB pages of the list or the entire list of TLB pages to be invalidated, and the invalidation message is used to invalidate multiple TLB pages on multiple processors of the host system. Other embodiments are described and claimed.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 4, 2007
    Inventors: Douglas Covelli, William Cheung, Koichi Yamada