Patents by Inventor Douglas D. Barga

Douglas D. Barga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10419227
    Abstract: A network interface controller (NIC), comprising: a Gigabit Fiber Transceiver; a Gigabit Ethernet Controller; a Gigabit Ethernet Switch; and a microprocessor unit (MPU), where the MPU initializes the Gigabit Ethernet Switch to pass Ethernet packets unmolested between the Gigabit Fiber Transceiver and the Gigabit Ethernet Controller, where the Gigabit Ethernet Switch maintains a link between the Gigabit Ethernet Controller and the Gigabit Fiber Transceiver whether or not a link speed between the Gigabit Ethernet Switch and the Gigabit Fiber Transceiver matches a link speed between the Gigabit Ethernet Switch and the Gigabit Ethernet Controller, where the MPU configures the Gigabit Ethernet Switch to match a link speed between the Gigabit Ethernet Switch and the Gigabit Fiber Transceiver with a link speed between the Gigabit Ethernet Switch and the Gigabit Ethernet Controller during normal operation, and where the Gigabit Ethernet Controller can respond to a Wake on LAN (WoL) request from a network.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: September 17, 2019
    Assignee: ALLIED TELESIS HOLDINGS KABUSHIKI KAISHA
    Inventors: Sean David Large, Douglas D. Barga
  • Publication number: 20180198633
    Abstract: A network interface controller (NIC), comprising: a Gigabit Fiber Transceiver; a Gigabit Ethernet Controller; a Gigabit Ethernet Switch; and a microprocessor unit (MPU), where the MPU initializes the Gigabit Ethernet Switch to pass Ethernet packets unmolested between the Gigabit Fiber Transceiver and the Gigabit Ethernet Controller, where the Gigabit Ethernet Switch maintains a link between the Gigabit Ethernet Controller and the Gigabit Fiber Transceiver whether or not a link speed between the Gigabit Ethernet Switch and the Gigabit Fiber Transceiver matches a link speed between the Gigabit Ethernet Switch and the Gigabit Ethernet Controller, where the MPU configures the Gigabit Ethernet Switch to match a link speed between the Gigabit Ethernet Switch and the Gigabit Fiber Transceiver with a link speed between the Gigabit Ethernet Switch and the Gigabit Ethernet Controller during normal operation, and where the Gigabit Ethernet Controller can respond to a Wake on LAN (WoL) request from a network.
    Type: Application
    Filed: January 8, 2018
    Publication date: July 12, 2018
    Inventors: Sean David Large, Douglas D. Barga
  • Patent number: 9557502
    Abstract: Systems, apparatuses, and devices for facilitating communication. An apparatus a first interface configured for coupling with a first pin pattern of an optical transceiver and a second interface configured for coupling with a second pin pattern of a printed circuit board. The apparatus is configured for communicatively coupling an optical transceiver having the first pin pattern with the second pin pattern of the printed circuit board.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: January 31, 2017
    Assignees: Allied Telesis Holdings Kabushiki Kaisha, Allied Telesis, Inc.
    Inventor: Douglas D. Barga
  • Publication number: 20160350249
    Abstract: Some embodiments provide an apparatus that includes a first interface, a second interface, and a data management module. The first interface is configured for communicating data with a device coupled to the first interface. The second interface is configured for communicating data with an external environment of the apparatus. The first interface is different from the second interface. The data management module is configured for routing data between the device and the external environment via the first and second interfaces upon detecting that the device is coupled to the first interface.
    Type: Application
    Filed: May 29, 2015
    Publication date: December 1, 2016
    Inventor: Douglas D. Barga
  • Publication number: 20160139352
    Abstract: Systems, apparatuses, and devices for facilitating communication. An apparatus a first interface configured for coupling with a first pin pattern of an optical transceiver and a second interface configured for coupling with a second pin pattern of a printed circuit board. The apparatus is configured for communicatively coupling an optical transceiver having the first pin pattern with the second pin pattern of the printed circuit board.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 19, 2016
    Inventor: Douglas D. Barga
  • Publication number: 20160132454
    Abstract: A system and method for facilitating communication. The system includes an adapter card and a first motherboard interface for coupling the adapter card to a motherboard. In some embodiments, the first motherboard interface is configured to transmit data between the adapter card and the motherboard. In some embodiments, the first motherboard interface is configured to supply power from the motherboard to the adapter card. The system further includes a second motherboard interface configured for communicative coupling of a component. In some embodiments, the adapter card comprises a portion configured for structurally coupling of the adapter card to the second motherboard interface. The system further includes an external interface for coupling the adapter card to an external environment of the system associated with the motherboard, where the external interface is configured to transmit data between the external environment of the system and the adapter card.
    Type: Application
    Filed: November 11, 2014
    Publication date: May 12, 2016
    Inventor: Douglas D. Barga
  • Publication number: 20160132456
    Abstract: A system and method for facilitating communication. The system includes an adapter card and a motherboard interface for coupling the adapter card to a motherboard. In some embodiments, the adapter card comprises an optical transmitter. In some embodiments, the motherboard interface is configured to transmit data between the adapter card and the motherboard. In some embodiments, the motherboard interface is configured to supply power from the motherboard to the adapter card. In some embodiments, the motherboard interface is a mini PCI express interface. The system may further comprise an external interface for coupling the adapter card to an external environment of a system associated with the motherboard. In some embodiments, the external interface is configured to transmit data between the external environment of the system and the adapter card.
    Type: Application
    Filed: November 11, 2014
    Publication date: May 12, 2016
    Inventor: Douglas D. Barga
  • Publication number: 20140365699
    Abstract: A device comprising an adapter card and a motherboard interface for coupling the adapter card to a motherboard. In some embodiments, the motherboard interface may be configured to transmit data between the adapter card and the motherboard. In some embodiments, the motherboard interface may be configured to supply power from the motherboard to the adapter card. In some embodiments, the device further comprises an external interface for coupling the adapter card to an external environment of a system associated with the motherboard. In some embodiments, the external interface is a non-peripheral connect interface slot and is configured to transmit data between the external environment of the system and the adapter card.
    Type: Application
    Filed: June 11, 2013
    Publication date: December 11, 2014
    Inventor: Douglas D. Barga