Patents by Inventor Douglas Dahlby

Douglas Dahlby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10539996
    Abstract: The disclosure relates to minimizing power consumption of a WiFi system-on-chip (SOC) during idle periods. The disclosed architecture includes memory banks for the WiFi SoC's embedded processor that can be independently powered on/off and a Memory Management Unit (MMU) to translate virtual addresses to physical addresses and generate exceptions to process accesses to virtual addresses without a corresponding physical address. The architecture can implement a demand paging scheme whereby a MMU fault from an access to code/data not within the embedded memory causes the processor to fetch the code/data from an off-chip secondary memory. To minimize page faults, the architecture stores WiFi client code/data within the embedded processor's memory that is repeatedly accessed with a short periodicity or where there is an intolerance for delays of accessing the code/data.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: January 21, 2020
    Assignee: Qualcomm Incorporated
    Inventors: Sandip HomChaudhuri, Douglas Dahlby, Murali Krishna, Harinder Singh, Ravi Konda, BalaSubrahmanyam Chintamneedi
  • Publication number: 20180150124
    Abstract: The disclosure relates to minimizing power consumption of a WiFi system-on-chip (SOC) during idle periods. The disclosed architecture includes memory banks for the WiFi SoC's embedded processor that can be independently powered on/off and a Memory Management Unit (MMU) to translate virtual addresses to physical addresses and generate exceptions to process accesses to virtual addresses without a corresponding physical address. The architecture can implement a demand paging scheme whereby a MMU fault from an access to code/data not within the embedded memory causes the processor to fetch the code/data from an off-chip secondary memory. To minimize page faults, the architecture stores WiFi client code/data within the embedded processor's memory that is repeatedly accessed with a short periodicity or where there is an intolerance for delays of accessing the code/data.
    Type: Application
    Filed: October 31, 2017
    Publication date: May 31, 2018
    Inventors: Sandip HomChaudhuri, Douglas Dahlby, Murali Krishna, Harinder Singh, Ravi Konda, BalaSubrahmanyam Chintamneedi
  • Publication number: 20180150125
    Abstract: The disclosure relates to minimizing power consumption of a WiFi system-on-chip (SOC) during idle periods. The disclosed architecture includes memory banks for the WiFi SoC's embedded processor that can be independently powered on/off and a Memory Management Unit (MMU) to translate virtual addresses to physical addresses and generate exceptions to process accesses to virtual addresses without a corresponding physical address. The architecture can implement a demand paging scheme whereby a MMU fault from an access to code/data not within the embedded memory causes the processor to fetch the code/data from an off-chip secondary memory. To minimize page faults, the architecture stores WiFi client code/data within the embedded processor's memory that is repeatedly accessed with small periodicity or where there is an intolerance for delays of accessing the code/data.
    Type: Application
    Filed: October 31, 2017
    Publication date: May 31, 2018
    Inventors: Sandip HomChaudhuri, Douglas Dahlby, Murali Krishna, Harinder Singh, Ravi Konda, BalaSubrahmanyam Chintamneedi
  • Publication number: 20180150123
    Abstract: The disclosure relates to minimizing power consumption of a WiFi system-on-chip (SOC) during idle periods. The disclosed architecture includes memory banks for the WiFi SoC's embedded processor that can be independently powered on/off and a Memory Management Unit (MMU) to translate virtual addresses to physical addresses and generate exceptions to process accesses to virtual addresses without a corresponding physical address. The architecture can implement a demand paging scheme whereby a MMU fault from an access to code/data not within the embedded memory causes the processor to fetch the code/data from an off-chip secondary memory. To minimize page faults, the architecture stores WiFi client code/data within the embedded processor's memory that is repeatedly accessed with a short periodicity or where there is an intolerance for delays of accessing the code/data.
    Type: Application
    Filed: October 31, 2017
    Publication date: May 31, 2018
    Inventors: Sandip HomChaudhuri, Douglas Dahlby, Murali Krishna, Harinder Singh, Ravi Konda, BalaSubrahmanyam Chintamneedi
  • Patent number: 7978673
    Abstract: Wireless communication traffic channels are allocated based on random plus planned processes. A request for a traffic channel is sent on a random traffic channel that is not a dedicated random access channel. A determination is made whether to allocate a traffic channel based on status of a subscriber that sere the traffic channel request, including determining base on temps of subscription of the subscriber. An implementation at a base station includes receiving the request on a traffic channel making the determination, and assigning either the traffic channel on which the request was received, or another channel. In a user terminal, the user terminal sends the request on a random traffic channel that it is not assigned to, and receives a traffic channel allocation, or an indication that no channel is available.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: July 12, 2011
    Assignee: Intel Corporation
    Inventors: Christopher Richard Uhlik, Douglas Dahlby