Abstract: A phased array antenna includes an antenna housing having an array face defining an electrically conductive ground plane layer. A plurality of millimeter wavelength patch antenna elements are positioned on the array face and each include a primary substrate having front and rear sides and a driven antenna element positioned on the front side of the primary substrate. A ground plane layer is positioned on the rear side of the primary substrate and a dielectric layer is positioned on the ground plane layer. A microstrip quadrature-to-circular polarization circuit is positioned on the dielectric layer. A parasitic antenna element layer is spaced forward from the driven antenna element and at least one spacer is positioned between the parasitic antenna element layer and the primary substrate. This spacer is dimensioned for enhanced parasitic antenna element performance at millimeter wavelength radio frequency signals.

Abstract: An antenna device includes a dual polarized quad-ridge antenna horn having an electrically conductive conduit with first and second opposite ends along a horn axis. Four electrically conductive ridges are carried on an inner side of the electrically conductive conduit. A printed wiring board including a dielectric substrate is connected across the first end of the dual polarized quad-ridge antenna horn and transversely to the horn axis. Furthermore, an electrically conductive pattern is formed on the dielectric substrate and defines feed elements for the dual polarized quad-ridge antenna horn.

Abstract: A phased array antenna includes an antenna housing having a subarray assembly that supports beam forming network modules and an array face defining a ground plane substantially orthogonal to the subarray assembly. A plurality of millimeter wavelength patch antenna elements are positioned on the array face and each positioned adjacent a respective subarray assembly. The millimeter wavelength patch antenna elements each include a driven antenna element having a front and rear side and a parasitic antenna element positioned forward of the front side of the driven antenna element. A microstrip quadrature-to-circular polarization circuit is positioned rearward of the rear side of the driven antenna element and operatively connected to the driven antenna element. A single millimeter wavelength feed operatively connects the microstrip quadrature-to-circular polarization circuit with a respective adjacent beam forming network module supported on the orthogonal positioned subarray assembly.

Abstract: A multi-tile configured, two-dimensional phased array antenna architecture is configured of an gridwork of sub-array `tiles`, each of which contains a mechanically integrated and RF-integrated antenna elements and RF interface components therefor. Each tile is formed of a multilayer printed wiring board and supports a sub-array of antenna elements and their associated RF circuits, so that the tile itself is effectively an operative phased-array antenna. The gridwork supports the sub-array tiles in sealed engagement with the framework, whereby associated RF networks components at rear sides of the tiles are protected against the free space environment to which the antenna elements on front faces of the tiles are exposed. Each RF interface network contains signal processing circuitry for controlling the operation of a respective one or a set of the antenna elements on the front side of the tile.

Abstract: A stripline cross-over architecture includes a first stripline layer extending on a first side of a dielectric layer between a first signal input port and a plurality of first signal output ports. A second stripline layer extends on a second side of the dielectric layer between a second signal input port and a plurality of second signal output ports, crossing over the first stripline layer at a plurality of cross-overs of mutual overlap therebetween. The electrical lengths of the stripline layers are defined and the cross-overs are located such that electrical distances between the cross-overs and signal combination locations cause cross-coupled signals to cancel one another, when non cross-coupled signals are combined in phase.

Abstract: A distributed ground pad-based isolation arrangement for a multilayer stripline architecture is configured to effectively inhibit the mutual coupling of signals between overlapping regions of adjacent stripline networks of dielectrically separated transmission networks, without substantially increasing either the mass of the laminate structure or the lossiness of the stripline. At regions of mutual overlap, the stripline layers are spatially oriented at right angles to one another, and a limited area ground pad is interleaved between the stripline layers. To maintain the desired characteristic line impedance of a stripline layer as it passes over a ground pad, the width of the stripline layer is reduced in the overlap region. Each ground pad is connected to an external ground reference by plated vias, that extend through the dielectric layers and intersect outer grounded shielding layers of the laminate.

Abstract: A stripline isolation cross-over is configured to cancel signals that may be mutually coupled at cross-over points between adjacent stripline networks within a compact multilayer signal distribution architecture, such as one feeding elements of phased array antennas, without a shielding layer between adjacent signal distribution networks. The signal distribution networks includes layers of stripline, patterned on opposite sides of a dielectric layer. Wherever the stripline layers mutually overlap, they are oriented at right angles to one another, and one of the striplines is configured as a pair of power dividers, connected back-to-back via stripline interconnect passing the other stripline layer, to form a signal splitting-recombining stripline pair.

Abstract: A flat panel-configured electronically steered phased array antenna includes a planar distribution of densely nested microstrip dipole sub-arrays, arranged and controlled in a manner similar to microstrip `reflect-array` antenna elements. The resultant phase of a circularly polarized wave for a reflect-array fan-out distribution of dipole antenna elements is controlled by an associated plurality of triode-configured field emission devices. Each dipole element sub-array is plated to a resistive sub-layer on an interior surface of a flat first millimeter wave transmissive panel member of an evacuated flat panel type support structure. Mounted to a similar resistive layer on the interior surface of a second, flat panel member is a microstrip conductive layer partially overlapped around its periphery by respective fan-configured microstrip dipole antenna elements plated on the first panel member.

Abstract: A packaging structure mounts integrated circuit chips in a nested, cavity-up configuration, so as to permit access to the modules for reworkability, but without the use of a separate printed circuit board for support and interconnect among the modules. Each monolithic integrated circuit module comprises a cavity-up leadless chip carrier which is affixed to its own dedicated thermally and electrically conductive mounting base, that effectively plugs into an underlying ground plane, heat sink support. The mounting base may comprise of a thin conductive plate having a cylindrical stem, through which the mounting base is retained within an aperture in the underlying support. The underlying support has a plurality of cylindrical stem engaging apertures distributed in a matrix configuration, so that the insertion of a plurality of chip carrier mounting bases into the apertures of the matrix causes the mounting bases to be aligned edgewise in a tight edge-to-edge array.

Abstract: A package for a microwave circuit chip and associated microstrip antenna is formed of a multi-layer ceramic laminate within which is supported a microwave chip carrier and on an outer surface of which a microstrip antenna disposed. A first ceramic layer is supported on metallic base member and contains signal lines for interfacing the chip with the external world. Disposed atop the first ceramic layer is a second ceramic layer which forms a protective seal ring around the perimeter of the chip. A third ceramic cover layer is mounted atop the seal ring layer and contains one or more antenna elements on its outer surface. Signal line connections between the chip and the antenna elements are effected through tuned networks that extend from signal leads on the chip to conductors on the first ceramic layer. Signal connections from the first ceramic layer to the antenna on the cover may be formed by conductive vias through the ceramic seal ring layer or conductors along sidewalls of the seal ring layer and cover.

Abstract: A packaging structure mounts integrated circuit chips in a nested, cavity-up configuration, so as to permit access to the modules for reworkability, but without the use of a separate printed circuit board for support and interconnect among the modules. Each monolithic integrated circuit module comprises a cavity-up leadless chip carrier which is affixed to its own dedicated thermally and electrically conductive mounting base, that effectively plugs into an underlying ground plane, heat sink support. The mounting base may comprise of a thin conductive plate having a cylindrical stem, through which the mounting base is retained within an aperture in the underlying support. The underlying support has a plurality of cylindrical stem engaging apertures distributed in a matrix configuration, so that the insertion of a plurality of chip carrier mounting bases into the apertures of the matrix causes the mounting bases to be aligned edgewise in a tight edge-to-edge array.

Abstract: A three-state, two-output R.F. power divider is configured as a microstrip device having an input port and first and second output ports. Between these three ports there is disposed a substantially T-shaped microstrip transmission line structure such that the input port is coupled to a base portion of the T-shaped structure and the first and second output ports are coupled to opposite ends of a top portion of the T-shaped structure. A substantially U-shaped microstrip transmission line structure is intercoupled with the T-shaped structure such that end portions of the U-shaped structure are coupled to the top portion of the T-shaped structure and a bottom portion of the U-shaped structure is coupled to the base portion of the T-shaped structure. A first PIN diode is coupled between a first location of the T-shaped structure and a ground plane brassboard underlying the dielectric layer on which the microstrip metalization is formed.

Abstract: A TO can-style plug-in package employs a pin/glass interface. In a first embodiment the pin/glass seal interface has a center pin of reduced diameter embedded in a smaller outer diameter, lower dielectric constant glass than a conventional TO-can. The glass is surrounded by a metal ferrule. The metallic header through which the pin/glass interfaces extend is provided with a ridge adjacent to the end of a respective pin. This increase in thickness of the header surrounding each glass-embedded center pin provides a prescribed capacitive reactance component for compensating the inductive reactance of the interiorly extending segment of the center pin and any connecting lead through which the microwave integrated component is coupled to the pin. In a second embodiment, the thickness of insulator glass that surrounds the center conductor is less than the thickness of the header.

Abstract: A chip carrier assembly and support arrangement provides a thermally and conductively secure chip interface, and enables rapid insertion and removal of the carrier so that replacement or repair of MMIC components may be facilitated. The chip carrier, which contains one or more chip cavities, is cylindrically configured and made of a material that has a coefficient of thermal expansion that is relatively low compared to that of its surrounding housing, so that a substantially uniform radial compressive force, resulting from the difference in coefficients of thermal expansion of the housing and the carrier, acts uniformly between the cylindrical sidewall of the cylindrical slot in the housing and the cylindrical sidewall of the carrier, thereby securing the chip carrier to the housing and providing thermal and electrical continuity between the carrier and its support housing.

Abstract: A miniaturized transmission link architecture for intercoupling high frequency miniaturized integrated circuit components comprises a thin conductive plate in one surface of which a matrix or grid work of rectilinear grooves or channels are formed, creating "waffle-iron"-like pattern in one surface of the conductive plate. The spacing between channels corresponds to the width of a channel which, in turn, may be sized to substantially match the outer diameter of insulation jacketed wire that is placed in the channels. The depth of a channel or groove is slightly larger than the outer diameter of the wire to accommodate wire crossovers at intersections of the channels. The top surface of the "waffle-plate" is provided with a conductive foil to complete the shielding for the wires.

Abstract: A miniaturized transmission link architecture for intercoupling high frequency miniaturized integrated circuit components comprises a thin conductive plate in one surface of which a matrix or grid work of rectilinear grooves or channels are formed, creating "waffle-iron"-like pattern in one surface of the conductive plate. The spacing between channels corresponds to the width of a channel which, in turn, may be sized to substantially match the outer diameter of insulation jacketed wire that is placed in the channels. The depth of a channel or groove is slightly larger than the outer diameter of the wire to accommodate wire crossovers at intersections of the channels. The top surface of the "waffle-plate" is provided with a conductive foil to complete the shielding for the wires.

Abstract: A miniaturized microwave transmission link comprises short links of dielectric coated fine wire overlying a ground plane between signal coupling/launching pins of MICs. A dielectric cap is provided at each wire-pin termination and a layer of conductive foil is pressed onto the overall structure to form a conformal tunnel/channel microwave transmission line configuration. The resulting tunneline, and/or channeline transmission line structure may connect MICs in a compact housing or provide access from external terminals to leads in a IC chip.