Abstract: In some examples, an apparatus includes a circuit configured to receive communication on a first bus. The circuit is also configured to provide the communication on a second bus for a first period of time. The circuit is also configured to monitor a duration of the providing of the communication on the second bus. The circuit is also configured to, responsive to the duration exceeding a threshold amount, stop providing the communication on the second bus for a second period of time.

Abstract: In some examples, an apparatus includes a circuit configured to receive communication on a first bus. The circuit is also configured to provide the communication on a second bus for a first period of time. The circuit is also configured to monitor a duration of the providing of the communication on the second bus. The circuit is also configured to, responsive to the duration exceeding a threshold amount, stop providing the communication on the second bus for a second period of time.

Abstract: An example apparatus includes a termination network having a first input terminal coupled to a first input/output terminal and a second input terminal coupled to a second input/output terminal. The apparatus includes transmitter circuitry having a first output terminal coupled to the first input/output terminal and a second output terminal coupled to the second input/output terminal. The apparatus includes receiver circuitry having a first input terminal coupled to a first output terminal of the termination network and a second input terminal coupled to a second output terminal of the termination network. The apparatus includes control circuitry coupled to a third input terminal of the termination network, the control circuitry to: change an impedance of the termination network to compensate for a transient in a common mode voltage; and based on the common mode voltage reaching a steady state value, change the impedance of the termination network for steady state operation.

Abstract: In some examples, an apparatus includes a circuit configured to receive communication on a first bus. The circuit is also configured to provide the communication on a second bus for a first period of time. The circuit is also configured to monitor a duration of the providing of the communication on the second bus. The circuit is also configured to, responsive to the duration exceeding a threshold amount, stop providing the communication on the second bus for a second period of time.

Abstract: One example includes network physical link (PHY) switch system. The system includes a multiplexer to output a first of a plurality of data streams that are input to a PHY device in response to a first state of a selection signal. The system also includes a data detector that monitors the first data stream and provides a trigger signal in response to a predetermined condition associated with the first data stream. The system further includes a switching controller that provides the selection signal, and in response to a switching command signal indicating a command to switch from the first data stream to the second data stream, monitors the data detector for the trigger signal and changes the selection signal from the first state to a second state in response to receiving the trigger signal to switch to the second data stream of the plurality of data streams.

Abstract: A method for encoding data words into a frame is provided. Input data words are received on a first bus having a first width. The input data words are buffered so as to output intermediate data words onto a second bus having a second width. A transcode bit is generated from the intermediate data words, and a set of parity bits is generated from the intermediate words using a syndrome generator, where the syndrome generator uses a number of bits that are equal to the second width. A frame is then generated from the intermediate data words and the set of parity bits and is output to a third bus having the first width.

Abstract: One example includes network physical link (PHY) switch system. The system includes a multiplexer to output a first of a plurality of data streams that are input to a PHY device in response to a first state of a selection signal. The system also includes a data detector that monitors the first data stream and provides a trigger signal in response to a predetermined condition associated with the first data stream. The system further includes a switching controller that provides the selection signal, and in response to a switching command signal indicating a command to switch from the first data stream to the second data stream, monitors the data detector for the trigger signal and changes the selection signal from the first state to a second state in response to receiving the trigger signal to switch to the second data stream of the plurality of data streams.

Abstract: A method for determining an initial alignment for a frame of input data is provided. A frame for the input data is set, and the frame is synchronized. Specifically, a syndrome check of the frame is performed using a first predetermined number of bits, and a slip of a second predetermined number of bits is requested following the syndrome check. Evaluation of the syndrome check to determine whether the frame is aligned can then be performed in parallel with the slipping. The evaluation and slipping can then be repeated if the frame is misaligned. When the frame is aligned, a lock condition can be indicated, and the slip performed in parallel with the evaluation indicating that the frame is aligned can be deasserted. In addition, when the frame is aligned, error correction on the frame can be performed, and the error corrected frame can be formatted.

Abstract: A method for encoding data words into a frame is provided. Input data words are received on a first bus having a first width. The input data words are buffered so as to output intermediate data words onto a second bus having a second width. A transcode bit is generated from the intermediate data words, and a set of parity bits is generated from the intermediate words using a syndrome generator, where the syndrome generator uses a number of bits that are equal to the second width. A frame is then generated from the intermediate data words and the set of parity bits and is output to a third bus having the first width.

Abstract: A method for determining an initial alignment for a frame of input data is provided. A frame for the input data is set, and the frame is synchronized. Specifically, a syndrome check of the frame is performed using a first predetermined number of bits, and a slip of a second predetermined number of bits is requested following the syndrome check. Evaluation of the syndrome check to determine whether the frame is aligned can then be performed in parallel with the slipping. The evaluation and slipping can then be repeated if the frame is misaligned. When the frame is aligned, a lock condition can be indicated, and the slip performed in parallel with the evaluation indicating that the frame is aligned can be deasserted. In addition, when the frame is aligned, error correction on the frame can be performed, and the error corrected frame can be formatted.