Patents by Inventor Douglas Edward WENTE
Douglas Edward WENTE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240103595Abstract: High-speed data communication devices, e.g., repeaters, interfacing between a host and a peripheral operate such that high-speed components except for a host-side squelch detector are set or maintained in a deactivated state during an idle period of a micro frame. In an example, a start of a micro frame is detected on a data bus during a first time period. In a second time period after the first time period, the high-speed communication device determines whether at least one data packet is contained in the micro frame. When it is determined during the second time period that no data packet is contained in the micro frame, active components, except a squelch detector, are controlled to be inactive during a third time period after the second time period.Type: ApplicationFiled: December 11, 2023Publication date: March 28, 2024Inventors: Mustafa Ulvi Erdogan, Suzanne Mary Vining, Bharath Kumar Singareddy, Douglas Edward Wente
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Patent number: 11874718Abstract: High-speed data communication devices, e.g., repeaters, interfacing between a host and a peripheral operate such that high-speed components except for a host-side squelch detector are set or maintained in a deactivated state during an idle period of a micro frame. In an example, a start of a micro frame is detected on a data bus during a first time period. In a second time period after the first time period, the high-speed communication device determines whether at least one data packet is contained in the micro frame. When it is determined during the second time period that no data packet is contained in the micro frame, active components, except a squelch detector, are controlled to be inactive during a third time period after the second time period.Type: GrantFiled: May 25, 2021Date of Patent: January 16, 2024Assignee: Texas Instruments IncorporatedInventors: Mustafa Ulvi Erdogan, Suzanne Mary Vining, Bharath Kumar Singareddy, Douglas Edward Wente
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Patent number: 11792361Abstract: A redriver system adapted for coupling to a first device and to a second device includes first and second transmitter drivers and a snoop circuit. The first transmitter driver has a first enable input. The second transmitter driver has a second enable input. The snoop circuit is coupled to the first and second enable inputs. The snoop circuit is configured to determine whether the first device and the second device are to operate according to a first protocol. Responsive to the snoop circuit determining that the first and second devices are to operate according to the first protocol, the snoop circuit enables the first transmitter driver and disables the second transmitter driver. Responsive to the snoop circuit determining that the first and second devices are not to operate according to the first protocol, the snoop circuit disables the first transmitter driver and enables the second transmitter driver.Type: GrantFiled: June 30, 2021Date of Patent: October 17, 2023Assignee: Texas Instruments IncorporatedInventors: Charles Michael Campbell, Mustafa Ulvi Erdogan, Douglas Edward Wente, Sridhar Ramaswamy
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Patent number: 11580053Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.Type: GrantFiled: June 15, 2021Date of Patent: February 14, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Suzanne Mary Vining, Yonghui Tang, Douglas Edward Wente, Huanzhang Huang
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Patent number: 11543875Abstract: In an example, a data communication device includes one or more receivers, and one or more transmitters. The data communication device detects a start of frame packet (?SOF) on a data bus, wherein the ?SOF indicates the start of a microframe; determines whether there are any data packets contained in the microframe during a first threshold period after the ?SOF; and detects that there is no data packet contained in the microframe during the first threshold period after the ?SOF, and in response, transitions at least one of the one or more transmitters from an active state to an OFF state, and transitions the at least one of the one or more transmitters from the OFF state to the active state prior to a switchback period before the end of the microframe.Type: GrantFiled: January 18, 2022Date of Patent: January 3, 2023Assignee: Texas Instruments IncorporatedInventors: Suzanne Mary Vining, Douglas Edward Wente, Win Naing Maung, Julie Marie Nirchi
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Patent number: 11436173Abstract: Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.Type: GrantFiled: April 19, 2021Date of Patent: September 6, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Bhupendra Sharma, Huanzhang Huang, Douglas Edward Wente, Suzanne Mary Vining, Mustafa Ulvi Erdogan
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Patent number: 11386036Abstract: At least some aspects of the present disclosure provide for a method. In some examples, the method includes receiving, at a circuit, data via a differential input signal, detecting a rising edge in the data received via the differential input signal, and precharging a common mode voltage (Vcm) node of the differential input signal responsive to detecting the rising edge in the data received via the differential input signal, wherein the Vcm node is a floating node.Type: GrantFiled: May 6, 2019Date of Patent: July 12, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Saurabh Goyal, Bhupendra Sharma, Huanzhang Huang, Douglas Edward Wente, Suzanne Mary Vining, Mustafa Ulvi Erdogan
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Publication number: 20220206556Abstract: High-speed data communication devices, e.g., repeaters, interfacing between a host and a peripheral operate such that high-speed components except for a host-side squelch detector are set or maintained in a deactivated state during an idle period of a micro frame. In an example, a start of a micro frame is detected on a data bus during a first time period. In a second time period after the first time period, the high-speed communication device determines whether at least one data packet is contained in the micro frame. When it is determined during the second time period that no data packet is contained in the micro frame, active components, except a squelch detector, are controlled to be inactive during a third time period after the second time period.Type: ApplicationFiled: May 25, 2021Publication date: June 30, 2022Inventors: Mustafa Ulvi Erdogan, Suzanne Mary Vining, Bharath Kumar Singareddy, Douglas Edward Wente
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Publication number: 20220206983Abstract: A method of operating an embedded universal serial bus (eUSB) repeater includes holding an eUSB receiver and a USB transmitter in active states and holding a USB receiver and an eUSB transmitter in standby states. The method includes receiving by the eUSB receiver a token packet indicative of transmission of a first downstream packet, and transitioning the USB receiver and the eUSB transmitter from the standby states to the active states responsive to the token packet. The method includes transmitting the token packet by the USB transmitter. The method includes receiving by the eUSB receiver a downstream packet or receiving by the USB receiver an upstream packet within a first timeout period after receiving the token packet, and transmitting the downstream packet by the USB transmitter or transmitting the upstream packet by the eUSB transmitter.Type: ApplicationFiled: October 15, 2021Publication date: June 30, 2022Inventors: Mustafa Ulvi Erdogan, Bharath Kumar Singareddy, Suzanne Mary Vining, Srijan Rastogi, Sirish Oruganti, Douglas Edward Wente
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Publication number: 20220157222Abstract: An example apparatus includes: a first input and a second input, a first equalizer with a third input, a fourth input, and a fifth input, the third input coupled to the first input, the fourth input coupled to the second input, a second equalizer with a sixth input, a seventh input, and an eighth input, the sixth input coupled to the first input, the seventh input coupled to the second input, and a controller coupled to the fifth input and the eighth input.Type: ApplicationFiled: November 15, 2021Publication date: May 19, 2022Inventors: Yonghui Tang, Charles Michael Campbell, Mustafa Ulvi Erdogan, Douglas Edward Wente, Yanli Fan
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Publication number: 20220150445Abstract: A redriver system adapted for coupling to a first device and to a second device includes first and second transmitter drivers and a snoop circuit. The first transmitter driver has a first enable input. The second transmitter driver has a second enable input. The snoop circuit is coupled to the first and second enable inputs. The snoop circuit is configured to determine whether the first device and the second device are to operate according to a first protocol. Responsive to the snoop circuit determining that the first and second devices are to operate according to the first protocol, the snoop circuit enables the first transmitter driver and disables the second transmitter driver. Responsive to the snoop circuit determining that the first and second devices are not to operate according to the first protocol, the snoop circuit disables the first transmitter driver and enables the second transmitter driver.Type: ApplicationFiled: June 30, 2021Publication date: May 12, 2022Inventors: Charles Michael CAMPBELL, Mustafa Ulvi ERDOGAN, Douglas Edward WENTE, Sridhar RAMASWAMY
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Publication number: 20220137695Abstract: In an example, a data communication device includes one or more receivers, and one or more transmitters. The data communication device detects a start of frame packet (?SOF) on a data bus, wherein the ?SOF indicates the start of a microframe; determines whether there are any data packets contained in the microframe during a first threshold period after the ?SOF; and detects that there is no data packet contained in the microframe during the first threshold period after the ?SOF, and in response, transitions at least one of the one or more transmitters from an active state to an OFF state, and transitions the at least one of the one or more transmitters from the OFF state to the active state prior to a switchback period before the end of the microframe.Type: ApplicationFiled: January 18, 2022Publication date: May 5, 2022Inventors: Suzanne Mary Vining, Douglas Edward Wente, Win Naing Maung, Julie Marie Nirchi
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Patent number: 11281284Abstract: A method includes detecting a micro start of frame packet (?SOF) on a data bus. If there is at least one data packet contained in a microframe during the first threshold period after the ?SOF, transmitters are held in an active state. If there is no data packet in the first threshold period after the ?SOF, the transmitters are transitioned from the active state to an OFF state. The method also includes transitioning the transmitters from the OFF state to the active state prior to a switchback period before the end of the microframe. The method also includes transitioning the transmitters from the OFF state to the active state if a data packet is received in the OFF state. The method also includes dropping the data packet received in the OFF state and transitioning from the OFF state to the active state when the data packet is dropped.Type: GrantFiled: December 17, 2019Date of Patent: March 22, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Suzanne Mary Vining, Douglas Edward Wente, Win Naing Maung, Julie Marie Nirchi
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Patent number: 11153135Abstract: Methods and systems of adaptive equalization to compensate channel loss are disclosed. A method includes detecting a peak amplitude of an equalizer output signal and selecting a set of reference voltage levels from M sets based on the peak amplitude of the equalizer output signal, each of the M sets having N reference voltage levels. The method includes continuing to increase an equalization level in predetermined steps to a next higher equalization level if the applied equalization level does not correspond to the over-equalization level and evaluating the distribution of the resulting hit counts for each increase to the next higher equalization level until the applied equalization level corresponds to the over-equalization level. The method includes decreasing to the previously applied lower equalization level if the applied equalization level corresponds to the over-equalization level.Type: GrantFiled: January 11, 2021Date of Patent: October 19, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Shita Guo, Yanli Fan, Mustafa Ulvi Erdogan, Douglas Edward Wente
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Publication number: 20210311898Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.Type: ApplicationFiled: June 15, 2021Publication date: October 7, 2021Inventors: Win Naing MAUNG, Yonghui TANG, Huanzhang HUANG, Douglas Edward WENTE
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Publication number: 20210311903Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.Type: ApplicationFiled: June 15, 2021Publication date: October 7, 2021Inventors: Win Naing MAUNG, Suzanne Mary VINING, Yonghui TANG, Douglas Edward WENTE, Huanzhang HUANG
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Publication number: 20210240648Abstract: Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.Type: ApplicationFiled: April 19, 2021Publication date: August 5, 2021Inventors: Win Naing MAUNG, Bhupendra SHARMA, Huanzhang HUANG, Douglas Edward WENTE, Suzanne Mary VINING, Mustafa Ulvi ERDOGAN
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Patent number: 11068428Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.Type: GrantFiled: May 16, 2019Date of Patent: July 20, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Yonghui Tang, Huanzhang Huang, Douglas Edward Wente
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Patent number: 11068435Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.Type: GrantFiled: January 24, 2020Date of Patent: July 20, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Suzanne Mary Vining, Yonghui Tang, Douglas Edward Wente, Huanzhang Huang
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Patent number: 11010319Abstract: Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.Type: GrantFiled: May 14, 2020Date of Patent: May 18, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Bhupendra Sharma, Huanzhang Huang, Douglas Edward Wente, Suzanne Mary Vining, Mustafa Ulvi Erdogan