Patents by Inventor Douglas Holberg
Douglas Holberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8010819Abstract: A microcontroller unit includes a processor for generating a first control signal to start a comatose mode of operation for the microcontroller unit. Control logic responsive to the first control signal generates an enable signal at a first level and the control logic is further responsive to a second control signal for generating the enable signal at a second level. A voltage regulator generates regulated voltage from an input voltage. The voltage regulator shuts down to provide a zero volt regulated voltage responsive to the enable signal at the first level and powers up to provide a regulated voltage at an operating level responsive to the enable signal at the second level.Type: GrantFiled: October 21, 2008Date of Patent: August 30, 2011Assignee: Silicon LaboratoriesInventors: Douglas F. Pastorello, Douglas Holberg, William Gene Durbin, Biranchinath Sahu, Golam R. Chowdhury
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Publication number: 20090187773Abstract: A microcontroller unit includes a processor for generating a first control signal to start a comatose mode of operation for the microcontroller unit. Control logic responsive to the first control signal generates an enable signal at a first level and the control logic is further responsive to a second control signal for generating the enable signal at a second level. A voltage regulator generates regulated voltage from an input voltage. The voltage regulator shuts down to provide a zero volt regulated voltage responsive to the enable signal at the first level and powers up to provide a regulated voltage at an operating level responsive to the enable signal at the second level.Type: ApplicationFiled: October 21, 2008Publication date: July 23, 2009Applicant: SILICON LABORATORIES INC.Inventors: DOUGLAS F. PASTORELLO, DOUGLAS HOLBERG, WILLIAM GENE DURBIN, BIRANCHINATH SAHU, GOLAM R. CHOWDHURY
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Patent number: 7504902Abstract: The integrated system on a chip with LINBUS network communication capabilities includes processing circuitry for performing predefined digital processing functionalities on the chip. A free running clock circuit generates a temperature compensated clock that does not require a synch signal from external to the chip. A LINBUS network communications interface digitally communicates with off-chip LINBUS devices. Communication between said on-chip LINBUS communications interface and the off-chip LINBUS devices is affected without clock recovery. The LINBUS network communication interface has a time base derived from the temperature compensated clock which is independent of any timing information in the input data received during a receive operation. The temperature compensated clock further provides an on-chip time reference for both the processing circuitry and the LINBUS network communications interface.Type: GrantFiled: December 29, 2006Date of Patent: March 17, 2009Assignee: Silicon Laboratories Inc.Inventors: Douglas Piasecki, Douglas Holberg
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Patent number: 7441131Abstract: A microcontroller unit includes a processor for generating a first control signal to start a comatose mode of operation for the microcontroller unit. Control logic responsive to the first control signal generates an enable signal at a first level and the control logic is further responsive to a second control signal for generating the enable signal at a second level. A voltage regulator generates regulated voltage from an input voltage. The voltage regulator shuts down to provide a zero volt regulated voltage responsive to the enable signal at the first level and powers up to provide a regulated voltage at an operating level responsive to the enable signal at the second level.Type: GrantFiled: September 30, 2005Date of Patent: October 21, 2008Assignee: Silicon Laboratories Inc.Inventors: Douglas F. Pastorello, Douglas Holberg, William Gene Durbin, Biranchinath Sahu, Golam R. Chowdhury
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Patent number: 7315200Abstract: Gain control for delta sigma analog-to-digital converter. A method is disclosed for driving the input of an integrator in a delta-sigma converter having an amplifier with a non-inverting input, an output and a positive input connected to a reference voltage and an integration capacitor connected between the non-inverting input and the output. An input voltage is sampled at a first rate onto an input sampling capacitor and then charge is dumped from the input sampling capacitor to the non-inverting input of the amplifier at a second time and at the first rate. A reference voltage is sampled onto a feedback sampling capacitor at substantially the first rate, and charge stored on the feedback sampling capacitor is dumped to the non-inverting input of the amplifier at a second rate different than the first rate.Type: GrantFiled: March 31, 2004Date of Patent: January 1, 2008Assignee: Silicon Labs CP, Inc.Inventors: Douglas Holberg, Ka Y. Leung
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Publication number: 20070300047Abstract: A reconfigurable processor includes a processor core for operating on a set of instructions to carry out predefined processes and includes a plurality of input/output pins in addition to a plurality of functional input/output blocks. These functional blocks allow the processing core to interface with the plurality of input/output pins, each of the functional input/output blocks having an associated and predetermined functionality. This functionality comprises the output as a function of the input, the function defined by the functionality. Each of the functional input/output blocks has a requirement for a defined number of the plurality of input/output pins wherein the total of the defined number for all of the plurality of functional input/output blocks exceeds the number of the plurality of input/output pins and wherein the processor core is interfaced with one of the input or output of each of the functional blocks.Type: ApplicationFiled: June 30, 2007Publication date: December 27, 2007Applicant: SILICON LABS CP, INC.Inventors: DONALD ALFANO, DANNY ALLRED, DOUGLAS PIASECKI, KENNETH FERNALD, KA LEUNG, BRIAN CALOWAY, ALVIN STORVIK, PAUL HIGHLEY, DOUGLAS HOLBERG
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Publication number: 20070296478Abstract: An integrated circuit package includes a processing core for operating on a set of instructions to carry out predefined processes. A plurality of comparators perform compare operations within the integrated circuit package. At least one control register is associated with each of the plurality of comparators. The plurality of comparators are programmable to operate in a plurality of operating modes responsive to control bits established in the at least one control register by the processing core.Type: ApplicationFiled: March 30, 2007Publication date: December 27, 2007Applicant: SILICON LABS CP INC.Inventors: DONALD ALFANO, DANNY ALLRED, DOUGLAS PIASECKI, KENNETH FERNALD, KA LEUNG, BRIAN CALOWAY, ALVIN STORVIK, PAUL HIGHLEY, DOUGLAS HOLBERG
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Publication number: 20070300046Abstract: An integrated circuit package includes a processing core for operating on a set of instructions to carry out predefined processes. A flash memory stores instructions within the integrated circuit package. A plurality of registers stores data and the program instructions during execution of the program instructions. A JTAG interface provides an interface with the integrated circuit package and enables interactions with the processing core and the plurality of registers. Emulation logic enables manipulating and monitoring program flow through the JTAG interface during execution of the program instructions.Type: ApplicationFiled: March 30, 2007Publication date: December 27, 2007Applicant: SILICON LABS CP INC.Inventors: DONALD ALFANO, DANNY ALLRED, DOUGLAS PIASECKI, KENNETH FERNALD, KA LEUNG, BRIAN CALOWAY, ALVIN STORVIK, PAUL HIGHLEY, DOUGLAS HOLBERG
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Publication number: 20070233912Abstract: The integrated system on a chip with LINBUS network communication capabilities includes processing circuitry for performing predefined digital processing functionalities on the chip. A free running clock circuit generates a temperature compensated clock that does not require a synch signal from external to the chip. A LINBUS network communications interface digitally communicates with off-chip LINBUS devices. Communication between said on-chip LINBUS communications interface and the off-chip LINBUS devices is affected without clock recovery. The LINBUS network communication interface has a time base derived from the temperature compensated clock which is independent of any timing information in the input data received during a receive operation. The temperature compensated clock further provides an on-chip time reference for both the processing circuitry and the LINBUS network communications interface.Type: ApplicationFiled: December 29, 2006Publication date: October 4, 2007Applicant: SILICON LABORATORIES INC.Inventors: DOUGLAS PIASECKI, DOUGLAS HOLBERG
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Publication number: 20070216548Abstract: An integrated circuit package includes a processing core and an internal oscillator. The processing core operates on a set of instructions to carry out predefined processes. The internal oscillator provides a system clock for the integrated circuit package. The internal oscillator has associated therewith an internal control register for controlling the operation of the internal oscillator responsive to control bits of the internal oscillator controlled by the processing core.Type: ApplicationFiled: March 30, 2007Publication date: September 20, 2007Applicant: SILICON LABS CP INC.Inventors: DONALD ALFANO, DANNY ALLRED, DOUGLAS PIASECKI, KENNETH FERNALD, KA LEUNG, BRIAN CALOWAY, ALVIN STORVIK, PAUL HIGHLEY, DOUGLAS HOLBERG
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Publication number: 20070220499Abstract: The present invention disclosed and claimed herein, in one aspect thereof, comprises a development system operating on a computer for evaluating compiled program code that was developed to run on a specific processor based functional IC having associated therewith memory and configurable data I/O modules, and which code defines the manner by which the functional IC will operate in a predetermined end application. An evaluation program is provided that is operable to run on the computer. A tool stick interfaces with the computer and includes a functional IC that is substantially operationally identical to the functional IC for which the compiled program code was developed to run on. The evaluation program is operable to interface with the tool stick to load the code in the functional IC associated with the tool stick and operable therewith such that the functional IC in the tool stick functions as a hardware emulator for the end application, such that the compiled code can be operated in hardware.Type: ApplicationFiled: October 2, 2006Publication date: September 20, 2007Applicant: SILICON LABORATORIES INC.Inventors: Ross Bannatyne, Gautam Penumetcha, Leonard Staller, Phillip Bayes, Douglas Holberg
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Publication number: 20070115046Abstract: A system and method for providing a tunable GMC filter is disclosed wherein a transconducted element having an attenuator in a feedback loop therewith is allowed to oscillate at a first oscillation frequency. An input to the filter enables tuning of the oscillation frequency to a pre-determined frequency.Type: ApplicationFiled: January 16, 2007Publication date: May 24, 2007Applicant: SILICON LABORATORIES INCInventors: GOLAM CHOWDHURY, DOUGLAS HOLBERG
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Publication number: 20070103357Abstract: A method for converting analog data to digital data is disclosed. The method includes operating an analog-to-digital data converter in a tracking mode to sample an input signal and in a convert mode to convert the sampled input signal after sampling to a digital signal. The analog-to-digital data converter is controlled with a controller to operate in different modes of operation by providing at least one step wherein the tracking mode of operation is controlled to initiate at a predetermined time to begin the sampling operation.Type: ApplicationFiled: December 29, 2006Publication date: May 10, 2007Applicant: SILICON LABS CP, INC.Inventors: DONALD ALFANO, DANNY ALLRED, DOUGLAS PIASECKI, KENNETH FERNALD, KA LEUNG, BRIAN CALOWAY, ALVIN STORVIK, PAUL HIGHLEY, DOUGLAS HOLBERG
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Publication number: 20070079148Abstract: A microcontroller unit includes a processor for generating a first control signal to start a comatose mode of operation for the microcontroller unit. Control logic responsive to the first control signal generates an enable signal at a first level and the control logic is further responsive to a second control signal for generating the enable signal at a second level. A voltage regulator generates regulated voltage from an input voltage. The voltage regulator shuts down to provide a zero volt regulated voltage responsive to the enable signal at the first level and powers up to provide a regulated voltage at an operating level responsive to the enable signal at the second level.Type: ApplicationFiled: September 30, 2005Publication date: April 5, 2007Inventors: Douglas Pastorello, Douglas Holberg, William Durbin, Biranchinath Sahu, Golam Chowdhury
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Publication number: 20060223454Abstract: An apparatus and method for calibrating a non-crystal oscillator in a transceiver unit using a crystal-oscillator includes the step of establishing a time base based upon oscillations of the crystal oscillator. A comparison of the number of oscillations for the non-crystal oscillator and the crystal oscillator is made during a known time period is made. An adjustment is determined based upon the established time base and the compared number of oscillations. The transceiving of the transceiver unit is then controlled based upon this adjustment.Type: ApplicationFiled: March 31, 2005Publication date: October 5, 2006Inventors: Alan Westwick, Douglas Holberg
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Publication number: 20060220630Abstract: A DC-DC digital pulse width modulated power supply is disclosed for generating a DC regulated output voltage. A digital control node has a digital control voltage disposed thereon for controlling the operation of the supply, wherein the digital control voltage has a substantially zero voltage when the output voltage of the supply is at a desired regulation, the digital control voltage having a resolution defined by a least significant bit (LSB). An input node receives a DC analog reference voltage defining the output voltage of the supply. A difference device determines the difference between the analog reference voltage and the output voltage to generate said digital control voltage. An LSB variation device varies the size of the LSB without varying the value of the digital control voltage for a substantially zero difference between the analog reference voltage and the output voltage.Type: ApplicationFiled: March 31, 2005Publication date: October 5, 2006Inventors: Jinwen Xiao, Ka Leung, Douglas Holberg
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Publication number: 20060212679Abstract: Field programmable mixed-signal integrated circuit. A reconfigurable processor system includes a processor core is provided that operates on a set of instructions to carry out predefined processes. A plurality of input/output pins are provided for interfacing with external signals. A reconfigurable interface interfaces between the processor core and the input/output pins. The reconfigurable interface is operable to define how each of the plurality of input/output pins interfaces with the processor core and the functionality associated therewith.Type: ApplicationFiled: May 4, 2006Publication date: September 21, 2006Inventors: Donald Alfano, Danny Allred, Douglas Piasecki, Kenneth Fernald, Ka Leung, Brian Caloway, Alvin Storvik, Paul Highley, Douglas Holberg
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Publication number: 20060197847Abstract: An image processor system for a charge coupled device (CCD) or CMOS imaging system includes a correlated double sample and variable gain (CDSVGA) circuit for receiving data from a CCD system and an automatic gain control (AGC) circuit which first controls gain by adjusting said CCD system and then for yet a higher gain level makes gain adjustments in said CDSVGA circuit AND a digital gain circuit to produce a combined target gain level. A processing system for an imager device includes a camera system for producing an imager signal, a correlated double sample (CDS) circuit for receiving data from an imager, a variable gain amplifier (VGA), an analog-to-digital converter (ADC) coupled to said CDS circuit, a digital gain circuit (DGC) coupled to said ADC, and an automatic gain control (AGC) circuit coupled to said DGC for controlling the CDS circuit and the DGC.Type: ApplicationFiled: May 1, 2006Publication date: September 7, 2006Inventors: Sandra Johnson, Shih-Chung Chao, Nadi Itani, Caiyi Wang, Brannon Harris, Ash Prabala, Douglas Holberg, Alan Hansford, Syed Azim, David Welland
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Publication number: 20060066392Abstract: A system and method for providing a tunable GMC filter is disclosed wherein a transconducted element having an attenuator in a feedback loop therewith is allowed to oscillate at a first oscillation frequency. An input to the filter enables tuning of the oscillation frequency to a pre-determined frequency.Type: ApplicationFiled: September 30, 2004Publication date: March 30, 2006Inventors: Golam Chowdhury, Douglas Holberg
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Publication number: 20050219093Abstract: Method and apparatus for combining outputs of multiple DACs for increased bit resolution. A method for providing an increased bit resolution to a data converter operable to convert digital information to analog values. A first current Digital-to-Analog (IDAC) converter is controlled to provide current to a first output node, the first IDAC having a first current step size associated with the Least Significant Bit (LSB) thereof. A second IDAC is controlled to provide current to the first output node, the second IDAC having a second current step size associated with the LSB thereof that is smaller than the first current step size. The combination of the first and second IDACs increases the bit resolution of the first IDAC when driving the first output node with the second IDAC.Type: ApplicationFiled: March 31, 2004Publication date: October 6, 2005Inventors: Douglas Piasecki, James Austin, Douglas Holberg, Kenneth Fernald