Patents by Inventor Douglas J. Mathews

Douglas J. Mathews has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936124
    Abstract: An antenna element can include a feed and a radiating element and a dielectric substrate having a first surface and a second surface, the dielectric substrate comprising the feed of the antenna element within the dielectric substrate. The antenna element module can also include an integrated circuit (IC) chip adhered to the first surface the dielectric substrate and coupled to the feed of the antenna element. The IC chip can include a circuit to adjust a signal communicated with the feed. The antenna element module can further include a plastic antenna carrier adhered to the second surface of the dielectric substrate. The plastic antenna carrier can include a body portion comprising a cavity for the radiating element of the antenna element, the radiating element positioned in the cavity of the body portion of the plastic antenna carrier.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: March 19, 2024
    Assignee: VIASAT, INC.
    Inventors: Douglas J. Mathews, David C. Wittwer, James F. Landers
  • Patent number: 11757203
    Abstract: Disclosed is an antenna apparatus including a first subassembly having a plurality of antenna elements, and a second subassembly adhered to the first subassembly. The second subassembly may include a plurality of components of a beamforming network encapsulated within a molding material. One or more interconnect layers may be disposed on the molding material to electrically couple the plurality of components of the beamforming network to the plurality of antenna elements. Methods of fabricating the antenna apparatus are also disclosed.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: September 12, 2023
    Assignee: VIASAT, INC.
    Inventors: Steven J. Franson, Douglas J. Mathews
  • Publication number: 20230026125
    Abstract: A phased array antenna includes an array of antenna element modules. Each of the array of antenna element modules includes a dielectric substrate having a lower surface and a radiating element. Each of the antenna element modules also includes an integrated circuit (IC) chip adhered to the lower surface of the dielectric substrate. The IC chip includes a circuit to adjust a signal communicated with the radiating element. The phased array antenna also includes a multi-layer substrate underlying the array of antenna element modules, the multi-layer substrate including a beam forming network (BFN) circuit formed on a layer of the multi-layer substrate and the BFN circuit is in electrical communication with the IC chip of each of the array of antenna element modules.
    Type: Application
    Filed: October 5, 2022
    Publication date: January 26, 2023
    Inventors: MARIA CAROLINA VIGANO, KENNETH V. BUER, DOUGLAS J. MATHEWS
  • Patent number: 11482791
    Abstract: A phased array antenna includes an array of antenna element modules. Each of the array of antenna element modules includes a dielectric substrate having a lower surface and a radiating element. Each of the antenna element modules also includes an integrated circuit (IC) chip adhered to the lower surface of the dielectric substrate. The IC chip includes a circuit to adjust a signal communicated with the radiating element. The phased array antenna also includes a multi-layer substrate underlying the array of antenna element modules, the multi-layer substrate including a beam forming network (BFN) circuit formed on a layer of the multi-layer substrate and the BFN circuit is in electrical communication with the IC chip of each of the array of antenna element modules.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: October 25, 2022
    Assignee: VIASAT, INC.
    Inventors: Maria Carolina Vigano, Kenneth V. Buer, Douglas J. Mathews
  • Publication number: 20220005770
    Abstract: Disclosed is an antenna apparatus including a substrate having a cavity in a first outer surface thereof. The substrate has a sidewall defining a portion of the cavity, and a first edge contact is formed at the sidewall. An IC chip is disposed within the cavity and has a side surface facing the sidewall and a second edge contact formed on the side surface electrically connected to the first edge contact. An antenna element, disposed at a second outer surface of the substrate opposite the first outer surface, is electrically connected to RF circuitry within the IC chip through a conductive via extending within the substrate.
    Type: Application
    Filed: July 12, 2021
    Publication date: January 6, 2022
    Inventors: STEVEN J. FRANSON, Douglas J. Mathews
  • Publication number: 20210367355
    Abstract: Disclosed is an antenna apparatus including a first subassembly having a plurality of antenna elements, and a second subassembly adhered to the first subassembly. The second subassembly may include a plurality of components of a beamforming network encapsulated within a molding material. One or more interconnect layers may be disposed on the molding material to electrically couple the plurality of components of the beamforming network to the plurality of antenna elements. Methods of fabricating the antenna apparatus are also disclosed.
    Type: Application
    Filed: May 12, 2021
    Publication date: November 25, 2021
    Inventors: Steven J. FRANSON, Douglas J. MATHEWS
  • Publication number: 20210257739
    Abstract: An antenna element can include a feed and a radiating element and a dielectric substrate having a first surface and a second surface, the dielectric substrate comprising the feed of the antenna element within the dielectric substrate. The antenna element module can also include an integrated circuit (IC) chip adhered to the first surface the dielectric substrate and coupled to the feed of the antenna element. The IC chip can include a circuit to adjust a signal communicated with the feed. The antenna element module can further include a plastic antenna carrier adhered to the second surface of the dielectric substrate. The plastic antenna carrier can include a body portion comprising a cavity for the radiating element of the antenna element, the radiating element positioned in the cavity of the body portion of the plastic antenna carrier.
    Type: Application
    Filed: July 31, 2019
    Publication date: August 19, 2021
    Inventors: DOUGLAS J. MATHEWS, DAVID C. WITTWER, JAMES F. LANDERS
  • Patent number: 11088098
    Abstract: Disclosed is an antenna apparatus including a substrate having a cavity in a first outer surface thereof. The substrate has a sidewall defining a portion of the cavity, and a first edge contact is formed at the sidewall. An IC chip is disposed within the cavity and has a side surface facing the sidewall and a second edge contact formed on the side surface electrically connected to the first edge contact. An antenna element, disposed at a second outer surface of the substrate opposite the first outer surface, is electrically connected to RF circuitry within the IC chip through a conductive via extending within the substrate.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: August 10, 2021
    Assignee: VIASAT, INC.
    Inventors: Steven J. Franson, Douglas J. Mathews
  • Publication number: 20210184366
    Abstract: A phased array antenna includes an array of antenna element modules. Each of the array of antenna element modules includes a dielectric substrate having a lower surface and a radiating element. Each of the antenna element modules also includes an integrated circuit (IC) chip adhered to the lower surface of the dielectric substrate. The IC chip includes a circuit to adjust a signal communicated with the radiating element. The phased array antenna also includes a multi-layer substrate underlying the array of antenna element modules, the multi-layer substrate including a beam forming network (BFN) circuit formed on a layer of the multi-layer substrate and the BFN circuit is in electrical communication with the IC chip of each of the array of antenna element modules.
    Type: Application
    Filed: February 1, 2021
    Publication date: June 17, 2021
    Applicant: ViaSat, Inc.
    Inventors: MARIA CAROLINA VIGANO, KENNETH V. BUER, DOUGLAS J. MATHEWS
  • Patent number: 11038281
    Abstract: Disclosed is an antenna apparatus including a first subassembly having a plurality of antenna elements, and a second subassembly adhered to the first subassembly. The second subassembly may include a plurality of components of a beamforming network encapsulated within a molding material. One or more interconnect layers may be disposed on the molding material to electrically couple the plurality of components of the beamforming network to the plurality of antenna elements. Methods of fabricating the antenna apparatus are also disclosed.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: June 15, 2021
    Assignee: VIASAT, INC.
    Inventors: Steven J. Franson, Douglas J. Mathews
  • Patent number: 10944180
    Abstract: A phased array antenna includes an array of antenna element modules. Each of the array of antenna element modules includes a dielectric substrate having a lower surface and a radiating element. Each of the antenna element modules also includes an integrated circuit (IC) chip adhered to the lower surface of the dielectric substrate. The IC chip includes a circuit to adjust a signal communicated with the radiating element. The phased array antenna also includes a multi-layer substrate underlying the array of antenna element modules, the multi-layer substrate including a beam forming network (BFN) circuit formed on a layer of the multi-layer substrate and the BFN circuit is in electrical communication with the IC chip of each of the array of antenna element modules.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: March 9, 2021
    Assignee: ViaSat, Inc.
    Inventors: Maria Carolina Vigano, Kenneth V. Buer, Douglas J. Mathews
  • Publication number: 20210050312
    Abstract: Disclosed is an antenna apparatus including a substrate having a cavity in a first outer surface thereof. The substrate has a sidewall defining a portion of the cavity, and a first edge contact is formed at the sidewall. An IC chip is disposed within the cavity and has a side surface facing the sidewall and a second edge contact formed on the side surface electrically connected to the first edge contact. An antenna element, disposed at a second outer surface of the substrate opposite the first outer surface, is electrically connected to RF circuitry within the IC chip through a conductive via extending within the substrate.
    Type: Application
    Filed: August 12, 2019
    Publication date: February 18, 2021
    Inventors: Steven J. Franson, Douglas J. Mathews
  • Publication number: 20210005977
    Abstract: Disclosed is an antenna apparatus including a first subassembly having a plurality of antenna elements, and a second subassembly adhered to the first subassembly. The second subassembly may include a plurality of components of a beamforming network encapsulated within a molding material. One or more interconnect layers may be disposed on the molding material to electrically couple the plurality of components of the beamforming network to the plurality of antenna elements. Methods of fabricating the antenna apparatus are also disclosed.
    Type: Application
    Filed: July 2, 2019
    Publication date: January 7, 2021
    Inventors: STEVEN J. FRANSON, DOUGLAS J. MATHEWS
  • Publication number: 20200366259
    Abstract: A packaged semiconductor chip includes a power amplifier die including a semiconductor substrate, and an input contact pad, an output contact pad, first and second direct-current (DC) contact pads, one or more transistors having an input coupled to the input contact pad, and an input bias coupling path electrically coupling the first DC contact pad to the second DC contact pad and the input contact pad implemented on the semiconductor substrate. The chip further includes a lead frame having one or more radio-frequency input pins electrically coupled to the input contact pad, one or more radio-frequency output pins electrically coupled to the output contact pad, and first and second input bias pins electrically coupled to the first and second DC contact pads, respectively.
    Type: Application
    Filed: January 17, 2019
    Publication date: November 19, 2020
    Applicant: VIASAT, INC.
    Inventors: Shih Peng SUN, Kenneth V. BUER, Michael R. LYONS, Gary P. ENGLISH, Qiang R. CHEN, Ramanamurthy V. DARAPU, Douglas J. MATHEWS, Mark S. BERKHEIMER, Brandon C. DRAKE
  • Publication number: 20190013580
    Abstract: A phased array antenna includes an array of antenna element modules. Each of the array of antenna element modules includes a dielectric substrate having a lower surface and a radiating element. Each of the antenna element modules also includes an integrated circuit (IC) chip adhered to the lower surface of the dielectric substrate. The IC chip includes a circuit to adjust a signal communicated with the radiating element. The phased array antenna also includes a multi-layer substrate underlying the array of antenna element modules, the multi-layer substrate including a beam forming network (BFN) circuit formed on a layer of the multi-layer substrate and the BFN circuit is in electrical communication with the IC chip of each of the array of antenna element modules.
    Type: Application
    Filed: April 25, 2018
    Publication date: January 10, 2019
    Applicant: ViaSat, Inc.
    Inventors: MARIA CAROLINA VIGANO, KENNETH V. BUER, DOUGLAS J. MATHEWS
  • Patent number: 7994619
    Abstract: An integrated circuit package system is provided including mounting a first device on a carrier, mounting a second device over the first device and the carrier in an offset face-to-face configuration, and connecting the first device and the second device at an overlap.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: August 9, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Richard P. Sheridan, Eric Gongora, Douglas J. Mathews
  • Patent number: 5311122
    Abstract: An RF test equipment and wire bond interface circuit (150) for facilitating the on-wafer (100) testing of integrated circuits (120) has an electrical interface (102,104,106), for providing electrical coupling to the IC (120) and a low-pass filter structure connected between the electric interface (102,104,106) and the IC (120). The low-pass filter structure comprises a first inductive element (108) connected in series with the electrical interface (102,104,106) for simulating wire bond reactances, a second inductive element (114) connected in series with the first inductive element (108) for making contact with the IC (120) and at least one capacitor (110,112) connected between ground and a point common to both the first (108) and the second (114) inductive elements, for providing shunt capacitance and defining a Tee type low-pass matched filter at the input (121) and the output (123) of the IC (120).
    Type: Grant
    Filed: December 2, 1991
    Date of Patent: May 10, 1994
    Assignee: Motorola, Inc.
    Inventors: Craig Fullerton, Douglas J. Mathews
  • Patent number: 5045820
    Abstract: A non-hermetic, three-dimensional, microwave semiconductor device carrier with integral waveguide couplers is disclosed. A molded plastic substrate having a suitable dielectric constant and varying thicknesses comprises plated conductors and locations for receiving GaAs MMIC's. MMIC's are mounted to a metal backplate and die bonded to the plated conductors. The waveguide couplers are integrally molded as part of the carrier substrate, and comprise plated through cylindrical members. Signals from a waveguide cavity are coupled to the MMIC's by inserting the waveguide couplers into a waveguide port. The carrier and integral waveguide coupler together with a plated molded cover forms a non-hermetic package providing pseudo-shielding cavities about the resident multiple semiconductor GaAs die. Transmission line impedance control is enhanced varying the substrate thickness on a per conductor basis. Frequency of operation exceeds 12 gigahertz.
    Type: Grant
    Filed: December 10, 1990
    Date of Patent: September 3, 1991
    Assignee: Motorola, Inc.
    Inventors: John L. Leicht, Hugh R. Malone, Douglas J. Mathews, James E. Mitzlaff, Scott D. Munier, Michele G. Oehlerking, Vernon R. Scott