Abstract: A circuit for converting an input logic signal to an output logic signal having differing high and/or low logic voltage levels includes an output transistor and a load resistor coupling a collector of the output transistor to a supply voltage. The emitter of the output transistor is grounded. An input stage clamps a base of the output transistor to ground when the input signal voltage level is low, thereby turning the output transistor off and allowing the load resistor to pull the output signal, produced at the output transistor collector, up to its high logic level. When the input signal is high, the input stage unclamps the base of the output transistor from ground and a feedback stage responsive to the output signal supplies feedback current to the base of the output transistor, which feedback current increases with the magnitude of the output logic signal. The feedback current turns on the transistor, thereby increasing load current through the load resistor so as to reduce the output signal level.