Abstract: A circuit is provided which receives pixel data and pixel addresses from a graphics processor and effectuates rapid clipping of image information lying outside of a corresponding window, and also provides a template memory for storing information corresponding to all areas of that window which are obscured by a higher priority window. The pixel addresses are simultaneously applied to an image memory, the template memory, and the window clipping circuit. A write control circuit enables a write signal produced by the graphics processor to be applied to a write input of the image memory only if the present pixel is located within the present window, as determined by the window clipping circuit, and is not in an obscured area of that window, as determined by the read-out of the template memory.