Patents by Inventor Douglas Lange

Douglas Lange has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11931233
    Abstract: An absorbent article includes a first waist region, a second waist region, and a crotch region disposed between the first and second waist regions; and a chassis having a topsheet, a backsheet, and an absorbent core positioned between the topsheet and the backsheet. The article also includes a side panel having an ultrasonically bonded, gathered laminate. The laminate has an elastomeric layer and a substrate and is joined to the chassis at a chassis attachment bond and positioned in one of the first or second waist regions. The ultrasonically bonded, gathered laminate also includes an ear structural feature comprising a surface modification to the substrate and comprising at least one of the following: embossing, apertures, perforations, slits, melted material or coatings, compressed material, secondary bonds that are disposed apart from a chassis attachment bond, plastic deformation, and folds.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: March 19, 2024
    Assignee: The Procter & Gamble Company
    Inventors: Sally Lin Kilbacak, Donald Carroll Roe, Jeromy Thomas Raycheck, Uwe Schneider, Michael Devin Long, Michael Brian Quade, Jason Edward Naylor, Jeffry Rosiak, Stephen Joseph Lange, Urmish Popatlal Dalal, Christopher Krasen, Todd Douglas Lenser
  • Publication number: 20050272209
    Abstract: An integrated circuit die includes an active area having source dopants and contacts. An active area metal layer overlies the active area. A sense area is disposed on the die. A sense area metal layer overlies the sense area. A plurality of polysilicon gate stripes, polysilicon openings, and body stripes are disposed on the die, and extend in a continuous and uninterrupted manner from the active area into the sense area. A first region from which source dopants and contacts have been excluded surrounds a periphery of the sense area. An etched region is disposed over the first region, thereby separating and electrically isolating the sense area metal layer from the active area metal layer.
    Type: Application
    Filed: May 17, 2005
    Publication date: December 8, 2005
    Inventors: Joseph Yedinak, Dwayne Reichl, Douglas Lange
  • Patent number: 6798019
    Abstract: An IGBT has striped cell with source stripes 2a, 2b continuous or segmented along the length of the base stripe 3. The opposite stripes are periodically connected together by the N+ contact regions 20 to provide channel resistance along the width of the source stripes 2a, 2b. For continuous stripes the resistance between two sequential contact areas 20a, 20b is greatest in the middle and current concentrates near the source contact regions 20. The wider the spacing between the contacts 20, the larger the resistive drop to the midpoint between two N+ contacts 20.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: September 28, 2004
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Joseph A. Yedinak, Dwayne S. Reichl, Jack E. Wojslawowicz, Bernard J. Czeck, Robert D. Baran, Douglas Lange
  • Patent number: 6777747
    Abstract: An IGBT has a thick buffer region with increased doping to improve self-clamped inductive switching and device manufacture. A planar or trench gate IGBT has a buffer layer more than 25 microns thick. The buffer layer is doped high enough so that its carriers are more numerous than minority carriers, particularly at the transition between the N buffer & N drift region.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: August 17, 2004
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Joseph A. Yedinak, Jack E. Wojslawowicz, Bernard J. Czeck, Robert D. Baran, Douglas Lange
  • Publication number: 20030137015
    Abstract: An IGBT has striped cell with source stripes 2a, 2b continuous or segmented along the length of the base stripe 3. The opposite stripes are periodically connected together by the N+ contact regions 20 to provide channel resistance along the width of the source stripes 2a, 2b. For continuous stripes the resistance between two sequential contact areas 20a, 20b is greatest in the middle and current concentrates near the source contact regions 20. The wider the spacing between the contacts 20, the larger the resistive drop to the midpoint between two N+ contacts 20.
    Type: Application
    Filed: January 23, 2002
    Publication date: July 24, 2003
    Inventors: Joseph A. Yedinak, Dwayne S. Reichl, Jack E. Wojslawowicz, Bernard J. Czeck, Robert D. Baran, Douglas Lange
  • Publication number: 20030136974
    Abstract: An IGBT has a thick buffer region with increased doping to improve self-clamped inductive switching and device manufacture. A planar or trench gate IGBT has a buffer layer more than 25 microns thick. The buffer layer is doped high enough so that its carriers are more numerous than minority carriers, particularly at the transition between the N buffer & N drift region.
    Type: Application
    Filed: January 18, 2002
    Publication date: July 24, 2003
    Inventors: Joseph A. Yedinak, Jack E. Wojslawowicz, Bernard J. Czeck, Robert D. Baran, Douglas Lange
  • Patent number: D1018315
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: March 19, 2024
    Assignee: Owens-Brockway Glass Container Inc.
    Inventors: Douglas Laib, Katie Montemayor, Lars Lange, Nils Tiemann