Patents by Inventor Douglas La Tulipe

Douglas La Tulipe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11841531
    Abstract: There is set forth herein an optoelectrical device, comprising: a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, a photonics device dielectric stack, and a bond layer that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack. There is set forth herein a method comprising building an interposer base structure on a first wafer having a first substrate, including fabricating a plurality of through vias in the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layers; and building a photonics structure on a second wafer having a second substrate, including fabricating one or more photonics devices within a photonics device dielectric stack formed on the second substrate.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: December 12, 2023
    Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK
    Inventors: Douglas Coolbaugh, Douglas La Tulipe, Gerald Leake
  • Publication number: 20230244029
    Abstract: There is set forth herein a method including building a first photonics structure using, wherein the building the first photonics structure includes fabricating one or more photonics device.
    Type: Application
    Filed: January 9, 2023
    Publication date: August 3, 2023
    Inventors: William CHARLES, Douglas COOLBAUGH, Douglas LA TULIPE, Gerald L. LEAKE, Jr.
  • Patent number: 11550099
    Abstract: There is set forth herein a method including building a first photonics structure using a first wafer having a first substrate, wherein the building the first photonics structure includes integrally fabricating within a first photonics dielectric stack one or more photonics device, the one or more photonics device formed on the first substrate; building a second photonics structure using a second wafer having a second substrate, wherein the building the second photonics structure includes integrally fabricating within a second photonics dielectric stack a laser stack structure active region and one or more photonics device, the second photonics dielectric stack formed on the second substrate; and bonding the first photonics structure and the second photonics structure to define an optoelectrical system having the first photonics structure bonded the second photonics structure.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: January 10, 2023
    Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK
    Inventors: William Charles, Douglas Coolbaugh, Douglas La Tulipe, Gerald L. Leake, Jr.
  • Patent number: 11550173
    Abstract: There is set forth herein an integrated photonics structure having a waveguide disposed within a dielectric stack of the integrated photonics structure, wherein the integrated photonics structure further includes a field generating electrically conductive structure disposed within the dielectric stack; and a heterogenous structure attached to the integrated photonics structure, the heterogenous structure having field sensitive material that is sensitive to a field generated by the field generating electrically conductive structure.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: January 10, 2023
    Assignees: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK, GOVERNMENT OF THE UNITED STATES, AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE, MORTON PHOTONICS INCORPORATION
    Inventors: Douglas Coolbaugh, Douglas La Tulipe, Paul A. Morton, Nicholas G. Usechak
  • Publication number: 20220381974
    Abstract: There is set forth herein an optoelectrical device, comprising: a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, a photonics device dielectric stack, and a bond layer that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack. There is set forth herein a method comprising building an interposer base structure on a first wafer having a first substrate, including fabricating a plurality of through vias in the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layers; and building a photonics structure on a second wafer having a second substrate, including fabricating one or more photonics devices within a photonics device dielectric stack formed on the second substrate.
    Type: Application
    Filed: July 29, 2022
    Publication date: December 1, 2022
    Applicant: The Research Foundation for The State University of New York
    Inventors: Douglas COOLBAUGH, Douglas LA TULIPE, Gerald LEAKE
  • Patent number: 11435523
    Abstract: There is set forth herein an optoelectrical system comprising: a conductive path for supplying an input voltage to a photonics device, wherein the conductive path comprises a base structure through via extending through a substrate and a photonics structure through via, the photonics structure through via extending through a photonics device dielectric stack. There is set forth herein an optoelectrical system comprising: a second structure fusion bonded to an interposer base dielectric stack of a first structure. There is set forth herein a method comprising: fabricating a second wafer built structure using a second wafer, the second wafer built structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second wafer based structure; and wafer scale bonding the second wafer built structure to a first wafer built structure.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: September 6, 2022
    Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK
    Inventors: Douglas Coolbaugh, Douglas La Tulipe, Gerald Leake
  • Patent number: 11029466
    Abstract: There is set forth herein a method including a substrate; a dielectric stack disposed on the substrate; one or more photonics device integrated in the dielectric stack; and a laser light source having a laser stack including a plurality of structures arranged in a stack, wherein structures of the plurality of structures are integrated in the dielectric stack, wherein the laser stack includes an active region configured to emit light in response to the application of electrical energy to the laser stack.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: June 8, 2021
    Assignees: The Research Foundation for the State University of New York, The Regents of the University of California
    Inventors: William Charles, John Bowers, Douglas Coolbaugh, Daehwan Jung, Jonathan Klamkin, Douglas La Tulipe, Gerald L. Leake, Jr., Songtao Liu, Justin Norman
  • Patent number: 10976491
    Abstract: In one embodiment an optoelectronic system can include a photonics interposer having a substrate and a functional interposer structure formed on the substrate, a plurality of through vias carrying electrical signals extending through the substrate and the functional interposer structure, and a plurality of wires carrying signals to different areas of the functional interposer structure. The system can further include one or more photonics device integrally formed in the functional interposer structure, and one or more prefabricated component attached to the functional interposer structure.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: April 13, 2021
    Assignees: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK, THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK, ANALOG PHOTONICS, LLC, ARIZONA BOARD OF REGENTS ON BEHALF OF THE UNIVERSITY OF ARIZONA
    Inventors: Douglas Coolbaugh, Michael Watts, Michal Lipson, Keren Bergman, Thomas Koch, Jeremiah Hebding, Daniel Pascual, Douglas La Tulipe
  • Publication number: 20210072568
    Abstract: There is set forth herein an integrated photonics structure having a waveguide disposed within a dielectric stack of the integrated photonics structure, wherein the integrated photonics structure further includes a field generating electrically conductive structure disposed within the dielectric stack; and a heterogenous structure attached to the integrated photonics structure, the heterogenous structure having field sensitive material that is sensitive to a field generated by the field generating electrically conductive structure.
    Type: Application
    Filed: November 18, 2020
    Publication date: March 11, 2021
    Inventors: Douglas COOLBAUGH, Douglas LA TULIPE, Paul A. MORTON, Nicholas G. USECHAK
  • Patent number: 10877300
    Abstract: There is set forth herein an integrated photonics structure having a waveguide disposed within a dielectric stack of the integrated photonics structure, wherein the integrated photonics structure further includes a field generating electrically conductive structure disposed within the dielectric stack; and a heterogenous structure attached to the integrated photonics structure, the heterogenous structure having field sensitive material that is sensitive to a field generated by the field generating electrically conductive structure.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: December 29, 2020
    Assignees: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK, GOVERNMENT OF THE UNITED STATES, AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE, MORTON PHOTONICS INCORPORATED
    Inventors: Douglas Coolbaugh, Douglas La Tulipe, Paul A. Morton, Nicholas G. Usechak
  • Publication number: 20200319403
    Abstract: There is set forth herein an optoelectrical system comprising: a conductive path for supplying an input voltage to a photonics device, wherein the conductive path comprises a base structure through via extending through a substrate and a photonics structure through via, the photonics structure through via extending through a photonics device dielectric stack. There is set forth herein an optoelectrical system comprising: a second structure fusion bonded to an interposer base dielectric stack of a first structure. There is set forth herein a method comprising: fabricating a second wafer built structure using a second wafer, the second wafer built structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second wafer based structure; and wafer scale bonding the second wafer built structure to a first wafer built structure.
    Type: Application
    Filed: June 23, 2020
    Publication date: October 8, 2020
    Inventors: Douglas COOLBAUGH, Douglas LA TULIPE, Gerald LEAKE
  • Patent number: 10698156
    Abstract: There is set forth herein a method including building an interposer base structure on a first wafer having a first substrate, wherein the building an interposer base structure includes fabricating a plurality of through vias that extend through the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layer; building a photonics structure on a second wafer having a second substrate, wherein the building a photonics structure includes fabricating within a photonics device dielectric stack formed on the second substrate one or more photonics device; and bonding the photonics structure to the interposer base structure to define an interposer having the interposer base structure and one or more photonics device fabricated within the photonics device dielectric stack.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: June 30, 2020
    Assignee: The Research Foundation for the State University of New York
    Inventors: Douglas Coolbaugh, Douglas La Tulipe, Gerald Leake
  • Publication number: 20200166703
    Abstract: There is set forth herein a method including a substrate; a dielectric stack disposed on the substrate; one or more photonics device integrated in the dielectric stack; and a laser light source having a laser stack including a plurality of structures arranged in a stack, wherein structures of the plurality of structures are integrated in the dielectric stack, wherein the laser stack includes an active region configured to emit light in response to the application of electrical energy to the laser stack.
    Type: Application
    Filed: September 19, 2019
    Publication date: May 28, 2020
    Inventors: William CHARLES, John BOWERS, Douglas COOLBAUGH, Daehwan JUNG, Jonathan KLAMKIN, Douglas La Tulipe, Gerald L. LEAKE, JR., Songtao LIU, Justin NORMAN
  • Publication number: 20200166720
    Abstract: There is set forth herein a method including building a first photonics structure using a first wafer having a first substrate, wherein the building the first photonics structure includes integrally fabricating within a first photonics dielectric stack one or more photonics device, the one or more photonics device formed on the first substrate; building a second photonics structure using a second wafer having a second substrate, wherein the building the second photonics structure includes integrally fabricating within a second photonics dielectric stack a laser stack structure active region and one or more photonics device, the second photonics dielectric stack formed on the second substrate; and bonding the first photonics structure and the second photonics structure to define an optoelectrical system having the first photonics structure bonded the second photonics structure.
    Type: Application
    Filed: September 19, 2019
    Publication date: May 28, 2020
    Inventors: William CHARLES, Douglas COOLBAUGH, Douglas La Tulipe, Gerald L. LEAKE, JR.
  • Publication number: 20180314003
    Abstract: There is set forth herein a method including building an interposer base structure on a first wafer having a first substrate, wherein the building an interposer base structure includes fabricating a plurality of through vias that extend through the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layer; building a photonics structure on a second wafer having a second substrate, wherein the building a photonics structure includes fabricating within a photonics device dielectric stack formed on the second substrate one or more photonics device; and bonding the photonics structure to the interposer base structure to define an interposer having the interposer base structure and one or more photonics device fabricated within the photonics device dielectric stack.
    Type: Application
    Filed: February 8, 2018
    Publication date: November 1, 2018
    Inventors: Douglas Coolbaugh, Douglas La Tulipe, JR., Gerald Leake
  • Publication number: 20180143374
    Abstract: In one embodiment an optoelectronic system can include a photonics interposer having a substrate and a functional interposer structure formed on the substrate, a plurality of through vias carrying electrical signals extending through the substrate and the functional interposer structure, and a plurality of wires carrying signals to different areas of the functional interposer structure. The system can further include one or more photonics device integrally formed in the functional interposer structure, and one or more prefabricated component attached to the functional interposer structure.
    Type: Application
    Filed: October 27, 2017
    Publication date: May 24, 2018
    Inventors: Douglas COOLBAUGH, Michael WATTS, Michal LIPSON, Keren BERGMAN, Thomas KOCH, Jeremiah HEBDING, Daniel PASCUAL, Douglas LA TULIPE
  • Publication number: 20070059922
    Abstract: The present invention relates to methods for post-etch, particularly post-RIE, removal of fluorocarbon-based residues from a hybrid dielectric structure. The hybrid dielectric structure contains a first dielectric material, and a line-level dielectric layer containing a second, different dielectric material, and wherein said second, different dielectric material comprises a polymeric thermoset dielectric material having a dielectric constant less than 4. Low energy electron beam or low temperature annealing is utilized by the present invention for removal of the fluorocarbon-based residues from such a hybrid dielectric structure, without damaging the low-k polymeric thermoset dielectric material contained in such a hybrid dielectric structure.
    Type: Application
    Filed: September 13, 2005
    Publication date: March 15, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lawrence Clevenger, Andrew Cowley, Timothy Dalton, Mark Hoinkis, Kaushik Kumar, Douglas La Tulipe, David Rath, Chih-Chao Yang
  • Publication number: 20060292852
    Abstract: An interconnect structure in the back end of the line of an integrated circuit forms contacts between successive layers by removing material in the top surface of the lower interconnect in a cone-shaped aperture, the removal process extending through the liner of the upper aperture, and depositing a second liner extending down into the cone-shaped aperture, thereby increasing the mechanical strength of the contact, which then enhance the overall reliability of the integrated circuit.
    Type: Application
    Filed: August 9, 2006
    Publication date: December 28, 2006
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, INFINEON TECHNOLOGIES NORTH AMERICA CORP.
    Inventors: Lawrence Clevenger, Andrew Cowley, Timothy Dalton, Mark Hoinkis, Steffen Kaldor, Erdem Kaltalioglu, Kaushik Kumar, Douglas La Tulipe, Jochen Schacht, Andrew Simon, Terry Spooner, Yun-Yu Wang, Clement Wann, Chih-Chao Yang
  • Publication number: 20060113278
    Abstract: A metal hardmask for use with a Dual Damascene process used in the manufacturing of semiconductor devices. The metal hardmask has advantageous translucent characteristics to facilitate alignment between levels while fabricating a semiconductor device and avoids the formation of metal oxide residue deposits. The metal hardmask comprises a first or primary layer of TiN (titanium nitride) and a second or capping layer of TaN (tantalum nitride).
    Type: Application
    Filed: January 12, 2006
    Publication date: June 1, 2006
    Inventors: Kaushik Kumar, Lawrence Clevenger, Timothy Dalton, Douglas La Tulipe, Andy Cowley, Erdem Kaltalioglu, Jochen Schacht, Andrew Simon, Mark Hoinkis, Steffen Kaldor, Chih-Chao Yang
  • Publication number: 20050208742
    Abstract: A method of producing an oxidized tantalum nitride (TaOxNx) hardmask layer for use in dual-damascene processing is described. Fine-line dual-damascene processing places competing, conflicting demands on the hardmask. Whereas critical dimension control needs a thicker hardmask, optical lithographic alignment is frustrated by the opacity of thick tantalum nitride (TaN). The technique solves the problem of TaN hardmask opacity with increasing thickness by oxidizing the TaN layer. Oxidation of the TaN hardmask increases the thickness of the hardmask to two to four times its original thickness and simultaneously increases its transparency by greater than ten times. This permits better CD control associated with a thicker hardmask while facilitating optical lithographic alignment.
    Type: Application
    Filed: March 17, 2004
    Publication date: September 22, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William America, Larry Clevenger, Andy Cowley, Timothy Dalton, Mark Hoinkis, Kaushik Kumar, Douglas La Tulipe