Abstract: A system for efficiently interconnecting computing nodes can include a plurality of computing nodes and a plurality of network switches coupled in parallel to the plurality of computing nodes. The system can also include a plurality of node interfaces. Each computing node among the plurality of computing nodes can include at least one node interface for each network switch among the plurality of network switches. The plurality of node interfaces corresponding to a computing node can be configured to send data to another computing node via the plurality of network switches. The system can also include a plurality of switch interfaces. Each network switch among the plurality of network switches can include at least one switch interface for each computing node among the plurality of computing nodes. A switch interface corresponding to the computing node can be coupled to a node interface corresponding to the computing node.

Abstract: A system for efficiently interconnecting computing nodes can include a plurality of computing nodes and a plurality of network switches coupled in parallel to the plurality of computing nodes. The system can also include a plurality of node interfaces. Each computing node among the plurality of computing nodes can include at least one node interface for each network switch among the plurality of network switches. The plurality of node interfaces corresponding to a computing node can be configured to send data to another computing node via the plurality of network switches. The system can also include a plurality of switch interfaces. Each network switch among the plurality of network switches can include at least one switch interface for each computing node among the plurality of computing nodes. A switch interface corresponding to the computing node can be coupled to a node interface corresponding to the computing node.

Abstract: A system for interconnecting a plurality of computing nodes includes a plurality of optical circuit switches and a plurality of electrical circuit switches. A first network stage comprises a first plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each computing node among the plurality of computing nodes is optically coupled to at least one of the first plurality of circuit switches. A second network stage comprises a second plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each circuit switch among the first plurality of circuit switches is optically coupled to each circuit switch among the second plurality of optical circuit switches.

Abstract: A system for using free-space optics to interconnect a plurality of computing nodes can include a plurality of node optical transceivers that are electrically coupled to at least some of the plurality of computing nodes. The system can also include a plurality of router optical transceivers that facilitate free-space optical communications with the plurality of node optical transceivers. Each node optical transceiver among the plurality of node optical transceivers can have a corresponding router optical transceiver that is optically coupled to the node optical transceiver. The system can also include a router that is coupled to the plurality of router optical transceivers. The router can be configured to route the free-space optical communications among the plurality of computing nodes.

Abstract: A system for interconnecting a plurality of computing nodes includes a plurality of optical circuit switches and a plurality of electrical circuit switches. A first network stage comprises a first plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each computing node among the plurality of computing nodes is optically coupled to at least one of the first plurality of circuit switches. A second network stage comprises a second plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each circuit switch among the first plurality of circuit switches is optically coupled to each circuit switch among the second plurality of optical circuit switches.

Abstract: A system for interconnecting a plurality of computing nodes includes a plurality of optical circuit switches and a plurality of electrical circuit switches. A first network stage comprises a first plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each computing node among the plurality of computing nodes is optically coupled to at least one of the first plurality of circuit switches. A second network stage comprises a second plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each circuit switch among the first plurality of circuit switches is optically coupled to each circuit switch among the second plurality of optical circuit switches.

Abstract: A system for efficiently interconnecting computing nodes can include a plurality of computing nodes and a plurality of network switches coupled in parallel to the plurality of computing nodes. The system can also include a plurality of node interfaces. Each computing node among the plurality of computing nodes can include at least one node interface for each network switch among the plurality of network switches. The plurality of node interfaces corresponding to a computing node can be configured to send data to another computing node via the plurality of network switches. The system can also include a plurality of switch interfaces. Each network switch among the plurality of network switches can include at least one switch interface for each computing node among the plurality of computing nodes. A switch interface corresponding to the computing node can be coupled to a node interface corresponding to the computing node.

Abstract: A system for interconnecting a plurality of computing nodes includes a plurality of optical circuit switches and a plurality of electrical circuit switches. A first network stage comprises a first plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each computing node among the plurality of computing nodes is optically coupled to at least one of the first plurality of circuit switches. A second network stage comprises a second plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each circuit switch among the first plurality of circuit switches is optically coupled to each circuit switch among the second plurality of optical circuit switches.

Abstract: A system for using free-space optics to interconnect a plurality of computing nodes can include a plurality of node optical transceivers that are electrically coupled to at least some of the plurality of computing nodes. The system can also include a plurality of router optical transceivers that facilitate free-space optical communications with the plurality of node optical transceivers. Each node optical transceiver among the plurality of node optical transceivers can have a corresponding router optical transceiver that is optically coupled to the node optical transceiver. The system can also include a router that is coupled to the plurality of router optical transceivers. The router can be configured to route the free-space optical communications among the plurality of computing nodes.

Abstract: A system for using free-space optics to interconnect a plurality of computing nodes can include a plurality of node optical transceivers that are electrically coupled to at least some of the plurality of computing nodes. The system can also include a plurality of router optical transceivers that facilitate free-space optical communications with the plurality of node optical transceivers. Each node optical transceiver among the plurality of node optical transceivers can have a corresponding router optical transceiver that is optically coupled to the node optical transceiver. The system can also include a router that is coupled to the plurality of router optical transceivers. The router can be configured to route the free-space optical communications among the plurality of computing nodes.

Abstract: A method of managing a power supply system for a data center includes circulating a fluid in a cooling circuit, obtaining data regarding a server located in the data center using a sensor, controlling the transfer of heat energy from the server to the fluid based on the data, coupling the fluid to an electrochemical power generator, and generating power for the server using the fluid in the electrochemical power generator.

Abstract: A power supply system for a data center includes a cooling circuit, an electrochemical power generator, a sensor, and a processor. The cooling circuit includes a fluid configured to receive heat energy generated by a server located in the data center. The electrochemical power generator is configured to receive and/or generate the fluid of the cooling circuit and to generate electrical energy for the server using the fluid. The sensor is configured to obtain data regarding the server. The processor is configured to control an amount of heat energy transferred from the server to the fluid based on the data.

Abstract: A power supply system for a data center includes a cooling circuit, an electrochemical power generator, a sensor, and a processor. The cooling circuit includes a fluid configured to receive heat energy generated by a server located in the data center. The electrochemical power generator is configured to receive and/or generate the fluid of the cooling circuit and to generate electrical energy for the server using the fluid. The sensor is configured to obtain data regarding the server. The processor is configured to control an amount of heat energy transferred from the server to the fluid based on the data.

Abstract: A power supply system for a data center includes a cooling circuit, an electrochemical power generator, a sensor, and a processor. The cooling circuit includes a fluid configured to receive heat energy generated by a server located in the data center. The electrochemical power generator is configured to receive and/or generate the fluid of the cooling circuit and to generate electrical energy for the server using the fluid. The sensor is configured to obtain data regarding the server. The processor is configured to control an amount of heat energy transferred from the server to the fluid based on the data.

Abstract: A computer processor includes a decoder for decoding machine instructions and an execution unit for executing those instructions. The decoder and the execution unit are capable of decoding and executing vector instructions that include one or more format conversion indicators. For instance, the processor may be capable of executing a vector-load-convert-and-write (VLoadConWr) instruction that provides for loading data from memory to a vector register. The VLoadConWr instruction may include a format conversion indicator to indicate that the data from memory should be converted from a first format to a second format before the data is loaded into the vector register. Other embodiments are described and claimed.

Abstract: A power supply system for a data center includes a cooling circuit, an electrochemical power generator, a sensor, and a processor. The cooling circuit includes a fluid configured to receive heat energy generated by a server located in the data center. The electrochemical power generator is configured to receive and/or generate the fluid of the cooling circuit and to generate electrical energy for the server using the fluid. The sensor is configured to obtain data regarding the server. The processor is configured to control an amount of heat energy transferred from the server to the fluid based on the data.

Abstract: In an embodiment, a processor includes a decode logic to receive and decode a first memory access instruction to store data in a cache memory with a replacement state indicator of a first level, and to send the decoded first memory access instruction to a control logic. In turn, the control logic is to store the data in a first way of a first set of the cache memory and to store the replacement state indicator of the first level in a metadata field of the first way responsive to the decoded first memory access instruction. Other embodiments are described and claimed.

Abstract: In an embodiment, a processor includes a decode logic to receive and decode a first memory access instruction to store data in a cache memory with a replacement state indicator of a first level, and to send the decoded first memory access instruction to a control logic. In turn, the control logic is to store the data in a first way of a first set of the cache memory and to store the replacement state indicator of the first level in a metadata field of the first way responsive to the decoded first memory access instruction. Other embodiments are described and claimed.

Abstract: A system for presenting an image on a user in a social setting includes an image projection system configured to detect the presence of a user via their mobile device when the user comes within a predefined proximity, such as within a real-world social setting (e.g., coffeehouse, bar, club, etc.). The image projection system is further configured to access a social network platform and detect media content associated with the user, particularly media content that the user has shared on the social network platform via their mobile device. The image projection system is further configured to project media content onto the user's body, clothing and/or personal items via a projector and dynamically adapt projection of the media content in the event the user moves within the social setting.

Abstract: A computer processor includes a decoder for decoding machine instructions and an execution unit for executing those instructions. The decoder and the execution unit are capable of decoding and executing vector instructions that include one or more format conversion indicators. For instance, the processor may be capable of executing a vector-load-convert-and-write (VLoadConWr) instruction that provides for loading data from memory to a vector register. The VLoadConWr instruction may include a format conversion indicator to indicate that the data from memory should be converted from a first format to a second format before the data is loaded into the vector register. Other embodiments are described and claimed.