Patents by Inventor Douglas M. Carmean
Douglas M. Carmean has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230125673Abstract: A system for interconnecting a plurality of computing nodes includes a plurality of optical circuit switches and a plurality of electrical circuit switches. A first network stage comprises a first plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each computing node among the plurality of computing nodes is optically coupled to at least one of the first plurality of circuit switches. A second network stage comprises a second plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each circuit switch among the first plurality of circuit switches is optically coupled to each circuit switch among the second plurality of optical circuit switches.Type: ApplicationFiled: December 22, 2022Publication date: April 27, 2023Inventors: Hitesh BALLANI, Christian L. BELADY, Lisa Ru-Feng HSU, Winston Allen SAUNDERS, Paolo COSTA, Douglas M. CARMEAN, Kai SHI, Charles BOECKER
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Patent number: 11539453Abstract: A system for interconnecting a plurality of computing nodes includes a plurality of optical circuit switches and a plurality of electrical circuit switches. A first network stage comprises a first plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each computing node among the plurality of computing nodes is optically coupled to at least one of the first plurality of circuit switches. A second network stage comprises a second plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each circuit switch among the first plurality of circuit switches is optically coupled to each circuit switch among the second plurality of optical circuit switches.Type: GrantFiled: February 10, 2021Date of Patent: December 27, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Hitesh Ballani, Christian L. Belady, Lisa Ru-Feng Hsu, Winston Allen Saunders, Paolo Costa, Douglas M. Carmean, Kai Shi, Charles Boecker
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Publication number: 20220141558Abstract: A system for efficiently interconnecting computing nodes can include a plurality of computing nodes and a plurality of network switches coupled in parallel to the plurality of computing nodes. The system can also include a plurality of node interfaces. Each computing node among the plurality of computing nodes can include at least one node interface for each network switch among the plurality of network switches. The plurality of node interfaces corresponding to a computing node can be configured to send data to another computing node via the plurality of network switches. The system can also include a plurality of switch interfaces. Each network switch among the plurality of network switches can include at least one switch interface for each computing node among the plurality of computing nodes. A switch interface corresponding to the computing node can be coupled to a node interface corresponding to the computing node.Type: ApplicationFiled: April 28, 2021Publication date: May 5, 2022Inventors: Hitesh BALLANI, Winston Allen SAUNDERS, Christian L. BELADY, Lisa Ru-Feng HSU, Paolo COSTA, Douglas M. CARMEAN
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Publication number: 20220140934Abstract: A system for interconnecting a plurality of computing nodes includes a plurality of optical circuit switches and a plurality of electrical circuit switches. A first network stage comprises a first plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each computing node among the plurality of computing nodes is optically coupled to at least one of the first plurality of circuit switches. A second network stage comprises a second plurality of circuit switches selected from among the plurality of optical circuit switches and the plurality of electrical circuit switches. Each circuit switch among the first plurality of circuit switches is optically coupled to each circuit switch among the second plurality of optical circuit switches.Type: ApplicationFiled: February 10, 2021Publication date: May 5, 2022Inventors: Hitesh BALLANI, Christian L. BELADY, Lisa Ru-Feng HSU, Winston Allen SAUNDERS, Paolo COSTA, Douglas M. CARMEAN, Kai SHI, Charles BOECKER
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Publication number: 20210409848Abstract: A system for using free-space optics to interconnect a plurality of computing nodes can include a plurality of node optical transceivers that are electrically coupled to at least some of the plurality of computing nodes. The system can also include a plurality of router optical transceivers that facilitate free-space optical communications with the plurality of node optical transceivers. Each node optical transceiver among the plurality of node optical transceivers can have a corresponding router optical transceiver that is optically coupled to the node optical transceiver. The system can also include a router that is coupled to the plurality of router optical transceivers. The router can be configured to route the free-space optical communications among the plurality of computing nodes.Type: ApplicationFiled: August 30, 2021Publication date: December 30, 2021Inventors: Winston Allen SAUNDERS, Christian L. BELADY, Lisa Ru-Feng HSU, Hitesh BALLANI, Paolo COSTA, Douglas M. CARMEAN
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Patent number: 11109122Abstract: A system for using free-space optics to interconnect a plurality of computing nodes can include a plurality of node optical transceivers that are electrically coupled to at least some of the plurality of computing nodes. The system can also include a plurality of router optical transceivers that facilitate free-space optical communications with the plurality of node optical transceivers. Each node optical transceiver among the plurality of node optical transceivers can have a corresponding router optical transceiver that is optically coupled to the node optical transceiver. The system can also include a router that is coupled to the plurality of router optical transceivers. The router can be configured to route the free-space optical communications among the plurality of computing nodes.Type: GrantFiled: June 30, 2020Date of Patent: August 31, 2021Assignee: Microsoft Technology Licensing, LLCInventors: Winston Allen Saunders, Christian L. Belady, Lisa Ru-Feng Hsu, Hitesh Ballani, Paolo Costa, Douglas M. Carmean
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Publication number: 20180199471Abstract: A method of managing a power supply system for a data center includes circulating a fluid in a cooling circuit, obtaining data regarding a server located in the data center using a sensor, controlling the transfer of heat energy from the server to the fluid based on the data, coupling the fluid to an electrochemical power generator, and generating power for the server using the fluid in the electrochemical power generator.Type: ApplicationFiled: March 6, 2018Publication date: July 12, 2018Applicant: Elwha LLCInventors: Christian L. Belady, Douglas M. Carmean, William Gates, Shaun L. Harris, Roderick A. Hyde, Muriel Y. Ishikawa, Sean M. James, Brian A. Janous, Jordin T. Kare, Jie Liu, Max N. Mankin, Gregory J. McKnight, Craig J. Mundie, Nathan P. Myhrvold, Tony S. Pan, Clarence T. Tegreene, Yaroslav A. Urzhumov, Charles Whitmer, Lowell L. Wood,, JR., Victoria Y.H. Wood
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Patent number: 9949411Abstract: A power supply system for a data center includes a cooling circuit, an electrochemical power generator, a sensor, and a processor. The cooling circuit includes a fluid configured to receive heat energy generated by a server located in the data center. The electrochemical power generator is configured to receive and/or generate the fluid of the cooling circuit and to generate electrical energy for the server using the fluid. The sensor is configured to obtain data regarding the server. The processor is configured to control an amount of heat energy transferred from the server to the fluid based on the data.Type: GrantFiled: May 15, 2017Date of Patent: April 17, 2018Assignee: Elwha LLCInventors: Christian L. Belady, Douglas M. Carmean, William Gates, Shaun L. Harris, Roderick A. Hyde, Muriel Y. Ishikawa, Sean M. James, Brian A. Janous, Jordin T. Kare, Jie Liu, Max N. Mankin, Gregory J. McKnight, Craig J. Mundie, Nathan P. Myhrvold, Tony S. Pan, Clarence T. Tegreene, Yaroslav A. Urzhumov, Charles Whitmer, Lowell L. Wood, Jr., Victoria Y. H. Wood
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Publication number: 20170251574Abstract: A power supply system for a data center includes a cooling circuit, an electrochemical power generator, a sensor, and a processor. The cooling circuit includes a fluid configured to receive heat energy generated by a server located in the data center. The electrochemical power generator is configured to receive and/or generate the fluid of the cooling circuit and to generate electrical energy for the server using the fluid. The sensor is configured to obtain data regarding the server. The processor is configured to control an amount of heat energy transferred from the server to the fluid based on the data.Type: ApplicationFiled: May 15, 2017Publication date: August 31, 2017Applicant: Elwha LLCInventors: Christian L. Belady, Douglas M. Carmean, William Gates, Shaun L. Harris, Roderick A. Hyde, Muriel Y. Ishikawa, Sean M. James, Brian A. Janous, Jordin T. Kare, Jie Liu, Max N. Mankin, Gregory J. McKnight, Craig J. Mundie, Nathan P. Myhrvold, Tony S. Pan, Clarence T. Tegreene, Yaroslav A. Urzhumov, Charles Whitmer, Lowell L. Wood,, JR., Victoria Y.H. Wood
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Patent number: 9655285Abstract: A power supply system for a data center includes a cooling circuit, an electrochemical power generator, a sensor, and a processor. The cooling circuit includes a fluid configured to receive heat energy generated by a server located in the data center. The electrochemical power generator is configured to receive and/or generate the fluid of the cooling circuit and to generate electrical energy for the server using the fluid. The sensor is configured to obtain data regarding the server. The processor is configured to control an amount of heat energy transferred from the server to the fluid based on the data.Type: GrantFiled: November 28, 2014Date of Patent: May 16, 2017Assignee: Elwha LLCInventors: Christian L. Belady, Douglas M. Carmean, William Gates, Shaun L. Harris, Roderick A. Hyde, Muriel Y. Ishikawa, Sean M. James, Brian A. Janous, Jordin T. Kare, Jie Liu, Max N. Mankin, Gregory J. McKnight, Craig J. Mundie, Nathan P. Myhrvold, Tony S. Pan, Clarence T. Tegreene, Yaroslav A. Urzhumov, Charles Whitmer, Lowell L. Wood, Jr., Victoria Y. H. Wood
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Patent number: 9495153Abstract: A computer processor includes a decoder for decoding machine instructions and an execution unit for executing those instructions. The decoder and the execution unit are capable of decoding and executing vector instructions that include one or more format conversion indicators. For instance, the processor may be capable of executing a vector-load-convert-and-write (VLoadConWr) instruction that provides for loading data from memory to a vector register. The VLoadConWr instruction may include a format conversion indicator to indicate that the data from memory should be converted from a first format to a second format before the data is loaded into the vector register. Other embodiments are described and claimed.Type: GrantFiled: March 15, 2013Date of Patent: November 15, 2016Assignee: Intel CorporationInventors: Eric Sprangle, Robert D. Cavin, Anwar Rohillah, Douglas M. Carmean
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Publication number: 20160157388Abstract: A power supply system for a data center includes a cooling circuit, an electrochemical power generator, a sensor, and a processor. The cooling circuit includes a fluid configured to receive heat energy generated by a server located in the data center. The electrochemical power generator is configured to receive and/or generate the fluid of the cooling circuit and to generate electrical energy for the server using the fluid. The sensor is configured to obtain data regarding the server. The processor is configured to control an amount of heat energy transferred from the server to the fluid based on the data.Type: ApplicationFiled: November 28, 2014Publication date: June 2, 2016Applicant: Elwha LLCInventors: Christian L. Belady, Douglas M. Carmean, William Gates, Shaun L. Harris, Roderick A. Hyde, Muriel Y. Ishikawa, Sean M. James, Brian A. Janous, Jordin T. Kare, Jie Liu, Max N. Mankin, Gregory J. McKnight, Craig J. Mundie, Nathan P. Myhrvold, Tony S. Pan, Clarence T. Tegreene, Yaroslav A. Urzhumov, Charles Whitmer, Lowell L. Wood,, JR., Victoria Y.H. Wood
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Patent number: 9170955Abstract: In an embodiment, a processor includes a decode logic to receive and decode a first memory access instruction to store data in a cache memory with a replacement state indicator of a first level, and to send the decoded first memory access instruction to a control logic. In turn, the control logic is to store the data in a first way of a first set of the cache memory and to store the replacement state indicator of the first level in a metadata field of the first way responsive to the decoded first memory access instruction. Other embodiments are described and claimed.Type: GrantFiled: November 27, 2012Date of Patent: October 27, 2015Assignee: Intel CorporationInventors: Andrew T. Forsyth, Ramacharan Sundararaman, Eric Sprangle, John C. Mejia, Douglas M. Carmean, Edward T. Grochowski, Robert D. Cavin
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Publication number: 20140149651Abstract: In an embodiment, a processor includes a decode logic to receive and decode a first memory access instruction to store data in a cache memory with a replacement state indicator of a first level, and to send the decoded first memory access instruction to a control logic. In turn, the control logic is to store the data in a first way of a first set of the cache memory and to store the replacement state indicator of the first level in a metadata field of the first way responsive to the decoded first memory access instruction. Other embodiments are described and claimed.Type: ApplicationFiled: November 27, 2012Publication date: May 29, 2014Inventors: Andrew T. Forsyth, Ramacharan Sundararaman, Eric Sprangle, John C. Mejia, Douglas M. Carmean, Mark C. Davis, Edward T. Grochowski, Robert D. Cavin
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Publication number: 20140111629Abstract: A system for presenting an image on a user in a social setting includes an image projection system configured to detect the presence of a user via their mobile device when the user comes within a predefined proximity, such as within a real-world social setting (e.g., coffeehouse, bar, club, etc.). The image projection system is further configured to access a social network platform and detect media content associated with the user, particularly media content that the user has shared on the social network platform via their mobile device. The image projection system is further configured to project media content onto the user's body, clothing and/or personal items via a projector and dynamically adapt projection of the media content in the event the user moves within the social setting.Type: ApplicationFiled: March 12, 2013Publication date: April 24, 2014Inventors: Margaret Morris, Douglas M. Carmean
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Patent number: 8667250Abstract: A computer processor includes a decoder for decoding machine instructions and an execution unit for executing those instructions. The decoder and the execution unit are capable of decoding and executing vector instructions that include one or more format conversion indicators. For instance, the processor may be capable of executing a vector-load-convert-and-write (VLoadConWr) instruction that provides for loading data from memory to a vector register. The VLoadConWr instruction may include a format conversion indicator to indicate that the data from memory should be converted from a first format to a second format before the data is loaded into the vector register. Other embodiments are described and claimed.Type: GrantFiled: December 26, 2007Date of Patent: March 4, 2014Assignee: Intel CorporationInventors: Eric Sprangle, Robert D. Cavin, Anwar Rohillah, Douglas M. Carmean
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Publication number: 20140019720Abstract: A computer processor includes a decoder for decoding machine instructions and an execution unit for executing those instructions. The decoder and the execution unit are capable of decoding and executing vector instructions that include one or more format conversion indicators. For instance, the processor may be capable of executing a vector-load-convert-and-write (VLoadConWr) instruction that provides for loading data from memory to a vector register. The VLoadConWr instruction may include a format conversion indicator to indicate that the data from memory should be converted from a first format to a second format before the data is loaded into the vector register. Other embodiments are described and claimed.Type: ApplicationFiled: February 7, 2013Publication date: January 16, 2014Inventors: Eric Sprangle, Robert D. Cavin, Anwar Rohillah, Douglas M. Carmean
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Publication number: 20130346920Abstract: Storage medium, method and apparatus associated with multi-sensorial expression of emotion to photos/pictures are disclosed herein. In embodiments, at least one storage medium may include a number of instructions configured to enable a computing device, in response to execution of the instructions by the computing device, to display a number of images having associated emotion classifications on a display device accessible to a number of users, and facilitate the number of users to individually and/or jointly modify the emotion classifications of the images in a multi-sensorial manner. Other embodiments may be disclosed or claimed.Type: ApplicationFiled: November 28, 2012Publication date: December 26, 2013Inventors: Margaret E. Morris, Douglas M. Carmean
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Publication number: 20130232318Abstract: A computer processor includes a decoder for decoding machine instructions and an execution unit for executing those instructions. The decoder and the execution unit are capable of decoding and executing vector instructions that include one or more format conversion indicators. For instance, the processor may be capable of executing a vector-load-convert-and-write (VLoadConWr) instruction that provides for loading data from memory to a vector register. The VLoadConWr instruction may include a format conversion indicator to indicate that the data from memory should be converted from a first format to a second format before the data is loaded into the vector register. Other embodiments are described and claimed.Type: ApplicationFiled: March 15, 2013Publication date: September 5, 2013Inventors: Eric Sprangle, Robert D. Cavin, Anwar Rohillah, Douglas M. Carmean
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Patent number: 8347066Abstract: Replay instruction morphing. One disclosed apparatus includes an execution unit to execute an instruction. A replay system replays an altered instruction if the execution unit executes the instruction erroneously.Type: GrantFiled: February 28, 2005Date of Patent: January 1, 2013Assignee: Intel CorporationInventors: Douglas M. Carmean, David J. Sager, Thomas F. Toll, Karol F. Menezes