Patents by Inventor Douglas Parks Sheppard

Douglas Parks Sheppard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low power set associative cache memory
    Patent number: 5913223
    Abstract: A four-way cache data memory is provided, having a cache data RAM (30) and a tag RAM (28). The tag RAM (28) is enabled to access one of the tags therein. This tag is compared with the tag portion of the received memory address to determine if a tag is stored therein. If a true comparison results, a HIT is indicated and this is utilized to enable a portion of the cache data RAM (30). The data in the enabled portion is then output on the data bus.
    Type: Grant
    Filed: January 25, 1993
    Date of Patent: June 15, 1999
    Inventors: Douglas Parks Sheppard, William Lau
  • Low power set associative cache memory with status inhibit of cache data output
    Patent number: 5682515
    Abstract: A four-way cache data memory is provided, having a cache data RAM (30) and a tag RAM (28). The tag RAM (28) is enabled to access one of the tags therein. This tag is compared with the tag portion of the received memory address to determine if a tag is stored therein. If a true comparison results, a HIT is indicated and this is utilized to enable a portion of the cache data RAM (30). The data in the enabled portion is then output on the data bus. Additionally, the data output of the cache data RAM (30) is inhibited unless it is determined that the cache data stored in the cache data RAM (30) is valid, this information stored in a status RAM (62).
    Type: Grant
    Filed: June 10, 1996
    Date of Patent: October 28, 1997
    Assignee: Benchmarq Microelectronics, Inc.
    Inventors: William Lau, Douglas Parks Sheppard