Abstract: An electrically-controlled camshaft phaser with a gearbox assembly, including a sun gear having outwardly-facing gear teeth; at least one planet gear, having outwardly-facing gear teeth, that moves radially relative to an axis of sun gear rotation; at least one pin that carries the planet gear; and a deformable outer ring, carried by the sun gear, that engages the planet gear and moves the planet gear radially toward a ring gear.

Abstract: An electrically-controlled camshaft phaser with a gearbox assembly, including a sun gear having outwardly-facing gear teeth; at least one planet gear, having outwardly-facing gear teeth, that moves radially relative to an axis of sun gear rotation; at least one pin that carries the planet gear; and a deformable outer ring, carried by the sun gear, that engages the planet gear and moves the planet gear radially toward a ring gear.

Abstract: A burner system for a furnace. The system may have a wedged or other shaped burner box. An air-fuel mixer may be attached to a smaller end of the burner box at virtually any angle relative to a direction of a gas and air mixture leaving the larger box end. A burner head may be attached to the larger end of the box. The burner head may be sufficient for numerous heater sections of a heat exchanger. A spacer and a radiation shield may be situated between the burner head and heat exchanger. An addition of the radiation shield may reduce the operating temperature of the burner box, burner head and/or spacer. A fan may move the gas and air mixture from the mixer, through the box and the burner head. The mixture may be ignited into a flame which is moved into the heat exchanger.

Abstract: The invention is an optical method and apparatus for measuring the temperature of semiconductor substrates in real-time, during thin film growth and wafer processing. Utilizing the nearly linear dependence of the interband optical absorption edge on temperature, the present method and apparatus result in highly accurate measurement of the absorption edge in diffuse reflectance and transmission geometry, in real time, with sufficient accuracy and sensitivity to enable closed loop temperature control of wafers during film growth and processing. The apparatus operates across a wide range of temperatures covering all of the required range for common semiconductor substrates.

Abstract: A system having a pre-mix burner manifold in a housing that may permit air to be drawn through slots in the housing to flow over an external surface of the manifold. The flow of air may maintain a temperature of the manifold lower than a temperature that the manifold might have without the flow. The manifold may be attached to a burner and heat exchanger.

Abstract: A burner system for a furnace. The system may have a wedged or other shaped burner box. An air-fuel mixer may be attached to a smaller end of the burner box at virtually any angle relative to a direction of a gas and air mixture leaving the larger box end. A burner head may be attached to the larger end of the box. The burner head may be sufficient for numerous heater sections of a heat exchanger. A spacer and a radiation shield may be situated between the burner head and heat exchanger. An addition of the radiation shield may reduce the operating temperature of the burner box, burner head and/or spacer. A fan may move the gas and air mixture from the mixer, through the box and the burner head. The mixture may be ignited into a flame which is moved into the heat exchanger.

Abstract: A system having a pre-mix burner manifold in a housing that may permit air to be drawn through slots in the housing to flow over an external surface of the manifold. The flow of air may maintain a temperature of the manifold lower than a temperature that the manifold might have without the flow. The manifold may be attached to a burner and heat exchanger.

Abstract: The invention is an optical method and apparatus for measuring the temperature of semiconductor substrates in real-time, during thin film growth and wafer processing. Utilizing the nearly linear dependence of the interband optical absorption edge on temperature, the present method and apparatus result in highly accurate measurement of the absorption edge in diffuse reflectance and transmission geometry, in real time, with sufficient accuracy and sensitivity to enable closed loop temperature control of wafers during film growth and processing. The apparatus operates across a wide range of temperatures covering all of the required range for common semiconductor substrates.

Abstract: The invention is an optical method and apparatus for measuring the temperature of semiconductor substrates in real-time, during thin film growth and wafer processing. Utilizing the nearly linear dependence of the interband optical absorption edge on temperature, the present method and apparatus result in highly accurate measurement of the absorption edge in diffuse reflectance and transmission geometry, in real time, with sufficient accuracy and sensitivity to enable closed loop temperature control of wafers during film growth and processing. The apparatus operates across a wide range of temperatures covering all of the required range for common semiconductor substrates.

Abstract: A ternary content addressable memory (CAM) cell is disclosed for providing reduced or minimized matchline (ML) capacitance and for increasing current between matchline and tail-line in the case of a mismatch. The speed of a CAM cell is generally inversely proportional to its ML capacitance, and proportional to the current. Conventional ternary CAM cells have many matchline transistors, each contributing to the matchline capacitance. Embodiments of the present invention have a single matchline transistor between a matchline and a ground line, or tail-line, of the CAM cell. The single matchline transistor couples the matchline to the tail-line in response to a discharge signal from a compare circuit. The compare circuit can be divided into a pull-up section for driving a gate voltage level control node and a discharge section for discharging the gate voltage level control node, the discharge signal being provided at the gate voltage level control node.

Abstract: The invention is an optical method and apparatus for measuring the temperature of semiconductor substrates in real-time, during thin film growth and wafer processing. Utilizing the nearly linear dependence of the interband optical absorption edge on temperature, the present method and apparatus result in highly accurate measurement of the absorption edge in diffuse reflectance and transmission geometry, in real time, with sufficient accuracy and sensitivity to enable closed loop temperature control of wafers during film growth and processing. The apparatus operates across a wide range of temperatures covering all of the required range for common semiconductor substrates.

Abstract: Apparatus for quantitatively measuring the curvature and/or relative tilt of large surfaces wherein a small array of parallel laser beams, each separated by a known distance, reflect from the surface of a sample and fall upon a feedback controlled front-surface steering mirror to a detector that measures both the change in separation of the reflected beams and the spatial translation of the entire array on the detector. The sample surface is translated beneath or in front of the fixed laser array by means of a computer controlled stage or other apparatus to create a 1-dimensional line scan or 2-dimensional map of both bow and relative tilt of the sample surface. A computer-driven, feedback-controlled steering mirror compensates for varying sample tilt by precisely realigning the reflected laser array onto the detector as the sample is translated.

Abstract: A ternary content addressable memory (CAM) cell is disclosed for providing reduced or minimized matchline (ML) capacitance and for increasing current between matchline and tail-line in the case of a mismatch. The speed of a CAM cell is generally inversely proportional to its ML capacitance, and proportional to the current. Conventional ternary CAM cells have many matchline transistors, each contributing to the matchline capacitance. Embodiments of the present invention have a single matchline transistor between a matchline and a ground line, or tail-line, of the CAM cell. The single matchline transistor couples the matchline to the tail-line in response to a discharge signal from a compare circuit. The compare circuit can be divided into a pull-up section for driving a gate voltage level control node and a discharge section for discharging the gate voltage level control node, the discharge signal being provided at the gate voltage level control node.

Abstract: A ternary content addressable memory (CAM) cell is disclosed for providing reduced or minimized matchline (ML) capacitance and for increasing current between matchline and tail-line in the case of a mismatch. The speed of a CAM cell is generally inversely proportional to its ML capacitance, and proportional to the current. Conventional ternary CAM cells have many matchline transistors, each contributing to the matchline capacitance. Embodiments of the present invention have a single matchline transistor between a matchline and a ground line, or tail-line, of the CAM cell. The single matchline transistor couples the matchline to the tail-line in response to a discharge signal from a compare circuit. The compare circuit can be divided into a pull-up section for driving a gate voltage level control node and a discharge section for discharging the gate voltage level control node, the discharge signal being provided at the gate voltage level control node.

Abstract: A ternary content addressable memory (CAM) cell is disclosed for providing reduced or minimized matchline (ML) capacitance and for increasing current between matchline and tail-line in the case of a mismatch. The speed of a CAM cell is generally inversely proportional to its ML capacitance, and proportional to the current. Conventional ternary CAM cells have many matchline transistors, each contributing to the matchline capacitance. Embodiments of the present invention have a single matchline transistor between a matchline and a ground line, or tail-line, of the CAM cell. The single matchline transistor couples the matchline to the tail-line in response to a discharge signal from a compare circuit. The compare circuit can be divided into a pull-up section for driving a gate voltage level control node and a discharge section for discharging the gate voltage level control node, the discharge signal being provided at the gate voltage level control node.

Abstract: A ternary content addressable memory (CAM) cell is disclosed for providing reduced or minimized matchline (ML) capacitance and for increasing current between matchline and tail-line in the case of a mismatch. The speed of a CAM cell is generally inversely proportional to its ML capacitance, and proportional to the current. Conventional ternary CAM cells have many matchline transistors, each contributing to the matchline capacitance. Embodiments of the present invention have a single matchline transistor between a matchline and a ground line, or tail-line, of the CAM cell. The single matchline transistor couples the matchline to the tail-line in response to a discharge signal from a compare circuit. The compare circuit can be divided into a pull-up section for driving a gate voltage level control node and a discharge section for discharging the gate voltage level control node, the discharge signal being provided at the gate voltage level control node.

Abstract: Techniques and systems for debugging an electronic system having instrumentation circuitry included therein are disclosed. The techniques and systems facilitate analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the invention enables the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

Abstract: The invention is a tool that generally enables the application of force to a bolt end along the longitudinal axis of a bolt. In the embodiment described herein, the invention involves the servicing of automobile hub by providing a means for safely and effectively removing the hub stud bolts that have seized to the steering knuckle or other component to which it is mounted. The invention eliminates the realistic probability of damaging the hub stud bolts' threads, ensures that striking force can be applied without bending or breaking the hub stud bolts, and provides a surface suitable for applying a sufficient striking force to free a seized hub from a steering knuckle or other component to which it is mounted. The invention can be manufactured in a straightforward manner. In the disclosed embodiment, the invention provides for the safe and effective removal of a hub from a steering knuckle, through the use of the invention, that can reduce the labor time and material costs in hub servicing an automobile hub.

Abstract: A ternary content addressable memory (CAM) cell is disclosed for providing reduced or minimized matchline (ML) capacitance and for increasing current between matchline and tail-line in the case of a mismatch. The speed of a CAM cell is generally inversely proportional to its ML capacitance, and proportional to the current. Conventional ternary CAM cells have many matchline transistors, each contributing to the matchline capacitance. Embodiments of the present invention have a single matchline transistor between a matchline and a ground line, or tail-line, of the CAM cell. The single matchline transistor couples the matchline to the tail-line in response to a discharge signal from a compare circuit. The compare circuit can be divided into a pull-up section for driving a gate voltage level control node and a discharge section for discharging the gate voltage level control node, the discharge signal being provided at the gate voltage level control node.

Abstract: A surgical motor designed to for power, noise and heat reduction for powering surgical tools where the surgical motor is modular constructed to house the vane motor for generating power in one module and the chuck and output shaft in the other module. A coupling mechanism for transmitting rotary motion from the vane motor to the output shaft includes balls made from elastomeric material to reduce vibrations and noise.