Patents by Inventor Douglas R. Curtis

Douglas R. Curtis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5898890
    Abstract: A first and second electronic devices are connected by two data lines arranged in a wired-AND configuration so that each device can signal the other device by forcing one of the two-wires into a "low" condition. An inventive method uses serial transfer of a predetermined numbers of bits in a digital word delimited by start and stop bits which are, in turn, defined by their relation to a clock signal on one of the data lines. The start and stop bits are chosen to be in a particular state during the "active" portion of the clock signal. Thus, the need for clocked gates or multivibrators is eliminated. In the preferred embodiment, the method and apparatus are used in a digital multimeter to intercouple a microprocessor and an electronic measuring circuit so that the microprocessor can control the measuring circuit and receive measured values from the circuit.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: April 27, 1999
    Assignee: AST Research, Inc.
    Inventors: Jerry J. Heep, Douglas R. Curtis
  • Patent number: 5606481
    Abstract: An overvoltage protection circuit for a CMOS electronic multimeter circuit uses a pair of complementary field-effect protection transistors connected to each input line of the meter circuit. The gate electrodes of the protection transistors are connected to bias voltage sources which provide bias voltages with magnitudes slightly less than the meter power supply voltages. The protection transistors go into conduction when an overvoltage condition causes the voltage on the input to exceed the bias voltages and the conducting protection transistors clamp the input voltage to substantially the bias voltage. Current caused by an overvoltage condition is shunted to ground thereby avoiding a charging condition in the power supplies.
    Type: Grant
    Filed: September 26, 1994
    Date of Patent: February 25, 1997
    Assignee: Tandy Corporation
    Inventors: Jerry J. Heep, Douglas R. Curtis
  • Patent number: 5414373
    Abstract: An automatic transistor checking method is provided, whereby an unknown, bipolar transistor may be typed, pinned and checked for forward DC gain, H.sub.fe. The method is suitable for portable instruments, because the method uses little battery current to perform the H.sub.fe measurement. The method automatically determines transistor type (NPN or PNP) and pinout, making it suitable for quick checking of batches of unknown devices.
    Type: Grant
    Filed: February 14, 1994
    Date of Patent: May 9, 1995
    Assignee: Tandy Corporation
    Inventors: Paul T. Schreiber, Douglas R. Curtis
  • Patent number: 5373410
    Abstract: A relatively large protection resistor is connected between the measurement in-out terminal and the internal circuitry of a digital multimeter. A clamping circuit at the input to the internal circuitry insures that any voltage applied to the input terminal will be dropped across the protection resistor, thereby avoiding an over-voltage condition which could damage the internal circuitry. A resistive divider network used to make measurements is connected between the protection resistor and the clamping circuit and is designed to take the protection resistor into account during measurements.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: December 13, 1994
    Assignee: Tandy Corporation
    Inventors: Paul T. Schreiber, Douglas R. Curtis
  • Patent number: 5355082
    Abstract: An automatic transistor checking method is provided, whereby an unknown, bipolar transistor may be typed, pinned and checked for forward DC gain, H.sub.fe. The method is suitable for portable instruments, because the method uses little battery current to perform the H.sub.fe measurement. The method automatically determines transistor type (NPN or PNP) and pinout, making it suitable for quick checking of batches of unknown devices.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: October 11, 1994
    Assignee: Tandy Corporation
    Inventors: Paul T. Schreiber, Douglas R. Curtis
  • Patent number: 5294889
    Abstract: A capacitance measuring circuit uses only a DC voltage source to perform the capacitance measurement. For this purpose, the circuit is arranged to charge an unknown capacitor which is being measured from a DC source and to discharge the capacitor through a constant current circuit such that the discharge voltage across the capacitor decreases linearly from its initial value to a predetermined, final value. The measurement circuit monitors the time taken by the capacitor to discharge in order to determine the capacitance value.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: March 15, 1994
    Assignee: Tandy Corporation
    Inventors: Jerry J. Heep, Douglas R. Curtis
  • Patent number: 5214321
    Abstract: An analog multiplier/divider circuit comprising in basic form four bipolar transistors with all collectors in common and a high gain differential input amplifier controlling an output transfer means. All input signals and the output signal are applied as currents to the emitters of the four transistors. The emitters, as opposed to the collectors, are monitored and sensed by the amplifier. The four transistors are arranged such that the base-emitter voltage of the third transistor, the value of which is proportional to the logarithm of a third input current applied to its emitter, is added to the base-emitter voltage of the fourth transistor, the value which is proportional to the logarithm of the output current applied to the fourth transistor's emitter.
    Type: Grant
    Filed: March 26, 1992
    Date of Patent: May 25, 1993
    Inventor: Douglas R. Curtis
  • Patent number: 4514704
    Abstract: A low-pass variable filter stage having a variable impedance circuit and may include an output buffer. The variable impedance circuit includes a transistor and a diode whose collector and anode respectively are connected to a current mirror and whose base and cathode respectively are connected to a voltage controlled current source. An external capacitor is connected across the diode to an external potential and the buffer is connected across the diode input.A first static voltage is applied producing a first static current in the transistor collector which is mirrored into the diode anode circuit as a second static current producing a second static voltage across the diode. The sum of the static currents form a control current flowing through the current source whose amplitude controls the small signal resistance of the diode. A small signal is superimposed upon the second static current. The diode resistance, the signal frequency, and the capacitor control which frequencies pass the filter.
    Type: Grant
    Filed: August 26, 1983
    Date of Patent: April 30, 1985
    Inventor: Douglas R. Curtis
  • Patent number: 4004141
    Abstract: An analog device for generating an output signal which is proportional to the linear product between a first input signal and the antilogarithm of the second input signal, and comprising a means for applying the second input signal simultaneously and identically across the base-emitter junction of two electrically matched transistors; a means for summing each differential component of the first input signal with the second input signal across one of the same base-emitter junctions is provided; and further including a means for differencing the signals developed in the collectors of the two transistors so that the output signal is comprised only of the desired product of the two input signals.
    Type: Grant
    Filed: August 4, 1975
    Date of Patent: January 18, 1977
    Inventor: Douglas R. Curtis