Abstract: Techniques for determining a suggested bid value that surpasses a selected bid are disclosed. A user selectable facility is provided. In response to receiving a selection event associated with the user selectable facility: (1) the value of the selected bid, which is other than the first ranked bid value, is established; (2) the suggested bid value is calculated by applying a predetermined minimum differential value to the selected bid value; and (3) the suggested bid value is conveyed to a user.

Abstract: Techniques for advancing a first bidder to a desired rank in an electronic auction are disclosed. In response to actuation of a bid rank advancement function by a first bidder, a new bid for the first bidder is calculated by applying a predetermined minimum differential value to a current bid of a second bidder that holds the desired rank in the electronic auction. The new bid is automatically submitted to the electronic auction on behalf of the first bidder.

Abstract: Techniques for advancing a first bidder to a desired rank in an electronic auction are disclosed. In response to actuation of a bid rank advancement function by a first bidder, a new bid for the first bidder is calculated by applying a predetermined minimum differential value to a current bid of a second bidder that holds the desired rank in the electronic auction. The new bid is automatically submitted to the electronic auction on behalf of the first bidder.

Abstract: The present invention provides a method for advancing a first bidder to a selected rank in an electronic auction. This method includes calculating, in response to actuation of a bid rank advancement function, a new bid for the first bidder, and displaying the new bid to the first bidder. The new bid is calculated by applying a predetermined minimum differential value to a current bid of a second bidder that holds the rank selected by the first bidder. In one embodiment, the rank selected by the first bidder is a rank other than first. The present invention also provides a system and apparatus for advancing a first bidder to a selected rank in an electronic auction.

Abstract: A method and apparatus for configuring and entering bids in an auction is disclosed. The method includes displaying a bid adjustment mechanism configuration interfaced to a bidder. Thereafter, a bid adjustment value for the bid adjustment mechanism is set using the configuration interface. Following the setting step, upon actuation of the bid adjustment mechanism, a bid is adjusted by the bid adjustment value previously set using the configuration interface.

Abstract: A method and system for conducting an auction having at least two competing bidders is disclosed. The method includes receiving bid data from at least one bidder and providing the bid data to a bidder that meets a condition for receiving the bid data. An apparatus for determining a suggested bid value that surpasses a selected bid is also disclosed. The apparatus includes a computer readable medium having stored thereon instructions which, when executed by a processor, cause the processor to provide a user selectable facility which, when selected establishes the value of the selected bid, calculates the suggested bid value by subtracting a predetermined minimum differential value from the selected bid value, and conveys the suggested bid value to the user.

Abstract: A method and apparatus for configuring and entering bids in an auction is disclosed. The method includes displaying a bid adjustment mechanism configuration interfaced to a bidder. Thereafter, a bid adjustment value for the bid adjustment mechanism is set using the configuration interface. Following the setting step, upon actuation of the bid adjustment mechanism, a bid is adjusted by the bid adjustment value previously set using the configuration interface.

Abstract: A method and apparatus for recovering the phase of a symbol clock operating at a predetermined symbol rate is described. A modulated RF signal which has been downconverted or a modulated baseband signal is filtered and sampled by a high speed converter. A high speed digital signal processor processes the digitized signal to determine the phase of the symbol clock. The symbol phase is determined independent of carrier phase by repetitively resampling the digitized signal and constructing the histogram for each resample of that signal. By comparing the histograms of each resample the symbol phase may be identified. Using the symbol rate and phase, the signal may be analyzed for carrier phase and frequency errors and modulation accuracy using eye diagrams, modulation trajectories and symbol content.

Abstract: Aliasing and synchronization difficulties in determining transfer functions in mixed domain (analog and digital) systems are overcome by sampling the analog signal at a higher sampling frequency that the digital signal, and zero filling the set of sampled digital data (if necessary) so that the sampled digital data corresponds to the more densely sampled analog data. By so doing, a single fixed frequency anti-alias filter in the analog channel can be used to avoid aliasing problems in mixed domain measurements over any span of frequencies, up to the entire passband of the filter. The invention is particularly illustrated with reference to measurements both across digital-to-analog boundaries and across analog-to-digital boundaries.

Abstract: Aliasing and synchronization difficulties in determining transfer functions in mixed domain (analog and digital) systems are overcome by sampling the analog signal at an integer multiple of the digital signal, and zero filling the set of sampled digital data so that the sampled digital data corresponds to the more densely sampled analog data. By so doing, a single fixed frequency anti-alias filter in the analog channel can be used to avoid aliasing problems in mixed domain measurements over any span of frequencies, up to the entire passband of the filter.