Patents by Inventor Douglas Robert Sitch

Douglas Robert Sitch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10330719
    Abstract: A sensor device includes at least two transducers, a sensor signal processing circuit, and a transducer to sensor signal processing circuit electrical connections, each connecting a respective one of the transducers to the sensor signal processing circuit. The device also includes a differential amplifier connected with two bond wires, the bond wires connected to the differential inputs of the differential amplifier and the amplifier output connected to the sensor signal processing circuit.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: June 25, 2019
    Assignee: SILICON SENSING SYSTEMS LIMITED
    Inventors: Michael Terence Durston, Douglas Robert Sitch
  • Patent number: 10135454
    Abstract: A successive approximation Analog to Digital Converter (ADC), comprising: a sample and hold device arranged to sample and hold an input signal at the beginning of a conversion cycle; a successive approximation register that sequentially builds up a digital output from its most significant bit to its least significant bit; a digital to analog converter that outputs a signal based on the output of the successive approximation register; a comparator that compares the output of the digital to analog converter with an output of the sample and hold device and supplies its output to the successive approximation register; and a residual signal storage device arranged to store the residual signal at the end of a conversion cycle; and wherein the successive approximation ADC is arranged to add the stored residual signal from the residual signal storage device to the input signal stored on the sample and hold device at the start of each conversion cycle.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: November 20, 2018
    Assignee: ATLANTIC INERTIAL SYSTEMS LIMITED
    Inventors: Michael Terence Durston, Kevin Townsend, Douglas Robert Sitch
  • Publication number: 20170346497
    Abstract: A successive approximation Analogue to Digital Converter (ADC), comprising: a sample and hold device arranged to sample and hold an input signal at the beginning of a conversion cycle; a successive approximation register that sequentially builds up a digital output from its most significant bit to its least significant bit; a digital to analogue converter that outputs a signal based on the output of the successive approximation register; a comparator that compares the output of the digital to analogue converter with an output of the sample and hold device and supplies its output to the successive approximation register; and a residual signal storage device arranged to store the residual signal at the end of a conversion cycle; and wherein the successive approximation ADC is arranged to add the stored residual signal from the residual signal storage device to the input signal stored on the sample and hold device at the start of each conversion cycle.
    Type: Application
    Filed: December 3, 2015
    Publication date: November 30, 2017
    Applicant: Atlantic Inertial Systems Limited
    Inventors: Michael Terence Durston, Kevin Townsend, Douglas Robert Sitch
  • Publication number: 20160370417
    Abstract: A sensor device comprising at least two transducers; a sensor signal processing circuit; transducer to sensor signal processing circuit electrical connections, each connecting a respective one of the transducers to the sensor signal processing circuit; a differential amplifier connected with two bond wires, the bond wires connected to the differential inputs of the differential amplifier and the amplifier output connected to the sensor signal processing circuit.
    Type: Application
    Filed: July 3, 2014
    Publication date: December 22, 2016
    Applicant: SILICON SENSING SYSTEMS LIMITED
    Inventors: Michael Terence Durston, Douglas Robert Sitch
  • Patent number: 9383400
    Abstract: An electronic circuit and method for carrying out built in test of a capacitor connected to, and arranged to suppress noise at, an input of an electrical circuit is disclosed. The electronic circuit causes current pulses at the input, and monitors the voltage at the input by comparing the voltage at the input with high and/or low reference voltages, outputting a fault signal if the voltage at the input is greater than a high reference voltage or lower than a low reference voltage.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: July 5, 2016
    Assignee: SILICON SENSING SYSTEMS LIMITED
    Inventors: Michael Durston, Douglas Robert Sitch
  • Patent number: 9176158
    Abstract: An inertial sensor is described that has a commanded test function. The sensor is of a ring type driven by a driver circuit, the sensor further includes primary and secondary portions having corresponding signal pickoffs. The primary pickoff signal amplitude is controlled via an automatic gain control, the primary phase lock loop and VCO locks to the resonant frequency to provide the clocks for the synchronous detectors, the primary pickoff signals via the primary phase shift circuit is provided to the primary driver, the secondary pickoff signal being input into a detector circuit capable of detecting motion in the sensor. The commanded test function includes a signal derived from the primary portion of the circuit and input into the two inputs of a differential amplifier in the secondary pickoff detector circuit.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: November 3, 2015
    Assignee: SILICON SENSING SYSTEMS LIMITED
    Inventors: Kevin Townsend, Michael Durston, Douglas Robert Sitch
  • Publication number: 20140320155
    Abstract: An electronic circuit and method for carrying out built in test of a capacitor connected to, and arranged to suppress noise at, an input of an electrical circuit is disclosed. The electronic circuit causes current pulses at the input, and monitors the voltage at the input by comparing the voltage at the input with high and/or low reference voltages, outputting a fault signal if the voltage at the input is greater than a high reference voltage or lower than a low reference voltage.
    Type: Application
    Filed: December 13, 2012
    Publication date: October 30, 2014
    Applicant: SILICON SENSING SYSTEMS LIMITED
    Inventors: Michael Durston, Douglas Robert Sitch
  • Publication number: 20130081463
    Abstract: An inertial sensor is described that has a commanded test function. The sensor is of a ring type driven by a driver circuit, the sensor further comprising primary and secondary portions having corresponding signal pickoffs. The primary pickoff signal amplitude is controlled via an automatic gain control, the primary phase lock loop and VCO locks to the resonant frequency to provide the clocks for the synchronous detectors, the primary pickoff signals via the primary phase shift circuit is provided to the primary driver, the secondary pickoff signal being input into a detector circuit capable of detecting motion in the sensor. The commanded test function comprises signal derived from the primary portion of the circuit and input into the two inputs of a differential amplifier in the secondary pickoff detector circuit.
    Type: Application
    Filed: March 3, 2011
    Publication date: April 4, 2013
    Applicant: SILICON SENSING SYSTEMS LIMITED
    Inventors: Kevin Townsend, Michael Durston, Douglas Robert Sitch
  • Patent number: 7619483
    Abstract: A digital phase locked loop includes a phase acquisition unit receiving a sampled input signal and applying its output to a first input of a digital phase detector, a digital controlled oscillator producing a digital output, and a feedback path coupling the digital output of the digital controlled oscillator to a second input of the digital phase detector in the digital domain. The input signal may be sampled asynchronously.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: November 17, 2009
    Assignee: Zarlink Semiconductor Inc.
    Inventors: Robertus Laurentius van der Valk, Paulus Hendricus Lodewijk Maria Schram, Douglas Robert Sitch
  • Publication number: 20080116980
    Abstract: A digital phase locked loop includes a phase acquisition unit receiving a sampled input signal and applying its output to a first input of a digital phase detector, a digital controlled oscillator producing a digital output, and a feedback path coupling the digital output of the digital controlled oscillator to a second input of the digital phase detector in the digital domain. The input signal may be sampled asynchronously.
    Type: Application
    Filed: November 14, 2007
    Publication date: May 22, 2008
    Applicant: ZARLINK SEMICONDUCTOR INC.
    Inventors: Robertus Laurentius van der Valk, Paulus Hendricus Lodewijk Maria Schram, Douglas Robert Sitch