Patents by Inventor Douglas S. Armbrust

Douglas S. Armbrust has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7094614
    Abstract: A method and apparatus are provided for controlling a CVD process used to deposit films on semiconductor substrates wherein the by-products of the reaction are measured and monitored during the reaction preferably using mass spectrometry and the results used to calculate the concentrations of the by-products and to control the CVD reaction process based on the by-product concentrations. An exemplary CVD process is the deposition of tungsten metal on a semiconductor wafer. A preferred method and apparatus uses a capillary gas sampling device for removing the by-product gases of the reaction as a feed for the mass spectrometer. The capillary gas sampling device is preferably connected to a differential pump.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: August 22, 2006
    Assignee: International Business Machines Corporation
    Inventors: Douglas S. Armbrust, John M. Baker, Arne W. Ballantine, Roger W. Cheek, Doreen D. DiMilia, Mark L. Reath, Michael B. Rice
  • Patent number: 6818992
    Abstract: A method for forming a semiconductor structure includes supplying a structure having an exposed last metalization layer, cleaning the last metalization layer, forming a silicide in a top portion of the last metalization layer and forming a terminal over the silicide.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: November 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: Douglas S. Armbrust, Margaret L. Gibson, Laura Serianni, Eric J. White
  • Patent number: 6773952
    Abstract: Semiconductor chip structures are provided with embedded thermal conductors for removing heat from one or more electrically conductive circuit members thereof, wherein the circuit members are formed on one or more dielectric layers above a substrate, each layer having a low dielectric constant and a low thermal conductivity. One or more cooling posts, for example, multiple thermally conductive plugs, are selectively disposed within the semiconductor chip structure adjacent to one or more electrically conductive members and thermally coupled thereto so that heat produced by the members is transferred into and through the cooling posts for forwarding to the substrate and/or to an upper surface of the semiconductor chip structure. The backside of the substrate has a thermal sink thermally coupled thereto and electrically isolated from the substrate.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: August 10, 2004
    Assignee: International Business Machines Corporation
    Inventors: Douglas S. Armbrust, William F. Clark, William A. Klaasen, William T. Motsiff, Timothy D. Sullivan
  • Patent number: 6610607
    Abstract: A method to define and tailor process limited lithographic features is provided. The method may be used to form sub lithographic spaces between features on a semiconductor wafer. A mask is formed and patterned on the wafer. Spacers are formed on sidewalls of the mask. The pattern of the mask and spacers is then transferred to an underlying layer.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: August 26, 2003
    Assignee: International Business Machines Corporation
    Inventors: Douglas S. Armbrust, Dale W. Martin, Jed H. Rankin, Sylvia Tousley
  • Patent number: 6512292
    Abstract: Semiconductor chip structures are provided with embedded thermal conductors for removing heat from one or more electrically conductive circuit members thereof, wherein the circuit members are formed on one or more dielectric layers above a substrate, each layer having a low dielectric constant and a low thermal conductivity. One or more cooling posts, for example, multiple thermally conductive plugs, are selectively disposed within the semiconductor chip structure adjacent to one or more electrically conductive members and thermally coupled thereto so that heat produced by the members is transferred into and through the cooling posts for forwarding to the substrate and/or to an upper surface of the semiconductor chip structure. The backside of the substrate has a thermal sink thermally coupled thereto and electrically isolated from the substrate.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: January 28, 2003
    Assignee: International Business Machines Corporation
    Inventors: Douglas S. Armbrust, William F. Clark, William A. Klaasen, William T. Motsiff, Timothy D. Sullivan
  • Publication number: 20030017650
    Abstract: Semiconductor chip structures are provided with embedded thermal conductors for removing heat from one or more electrically conductive circuit members thereof, wherein the circuit members are formed on one or more dielectric layers above a substrate, each layer having a low dielectric constant and a low thermal conductivity. One or more cooling posts, for example, multiple thermally conductive plugs, are selectively disposed within the semiconductor chip structure adjacent to one or more electrically conductive members and thermally coupled thereto so that heat produced by the members is transferred into and through the cooling posts for forwarding to the substrate and/or to an upper surface of the semiconductor chip structure. The backside of the substrate has a thermal sink thermally coupled thereto and electrically isolated from the substrate.
    Type: Application
    Filed: September 12, 2002
    Publication date: January 23, 2003
    Applicant: International Business Machines Corporation
    Inventors: Douglas S. Armbrust, William F. Clark, Willam A. Klaasen, William T. Motsiff, Timothy D. Sullivan
  • Publication number: 20020094681
    Abstract: A method and apparatus are provided for controlling a CVD process used to deposit films on semiconductor substrates wherein the by-products of the reaction are measured and monitored during the reaction preferably using mass spectrometry and the results used to calculate the concentrations of the by-products and to control the CVD reaction process based on the by-product concentrations. An exemplary CVD process is the deposition of tungsten metal on a semiconductor wafer. A preferred method and apparatus uses a capillary gas sampling device for removing the by-product gases of the reaction as a feed for the mass spectrometer. The capillary gas sampling device is preferably connected to a differential pump.
    Type: Application
    Filed: January 16, 2001
    Publication date: July 18, 2002
    Inventors: Douglas S. Armbrust, John M. Baker, Arne W. Ballantine, Roger W. Cheek, Doreen D. DiMilia, Mark L. Reath, Michael B. Rice
  • Patent number: 6251775
    Abstract: A method for forming a semiconductor structure includes supplying a structure having an exposed last metalization layer, cleaning the last metalization layer, forming a silicide in a top portion of the last metalization layer and forming a terminal over the silicide.
    Type: Grant
    Filed: April 23, 1999
    Date of Patent: June 26, 2001
    Assignee: International Business Machines Corporation
    Inventors: Douglas S. Armbrust, Margaret L. Gibson, Laura Serianni, Eric J. White