Patents by Inventor Douglas S. Greer

Douglas S. Greer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8041651
    Abstract: A processor architecture for a learning machine is presented which uses a massive array of processing elements having local, recurrent connections to form global associations between functions defined on manifolds. Associations between these functions provide the basis for learning cause-and-effect relationships involving vision, audition, tactile sensation and kinetic motion. Two arbitrary input signals hold each other in place in a manifold association processor and form the basis of short-term memory.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: October 18, 2011
    Inventor: Douglas S. Greer
  • Publication number: 20100316283
    Abstract: A processor architecture for a learning machine is presented which uses a massive array of processing elements having local, recurrent connections to form global associations between functions defined on manifolds. Associations between these functions provide the basis for learning cause-and-effect relationships involving vision, audition, tactile sensation and kinetic motion. Two arbitrary input signals hold each other in place in a manifold association processor and form the basis of short-term memory.
    Type: Application
    Filed: August 23, 2010
    Publication date: December 16, 2010
    Inventor: Douglas S. Greer
  • Patent number: 7805386
    Abstract: A processor architecture for a learning machine is presented which uses a massive array of processing elements having local, recurrent connections to form global associations between functions defined on manifolds. Associations between these functions provide the basis for learning cause-and-effect relationships involving vision, audition, tactile sensation and kinetic motion. Two arbitrary images hold each other in place in a manifold association processor and form the basis of short-term memory.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: September 28, 2010
    Inventor: Douglas S. Greer
  • Patent number: 5005578
    Abstract: A method and system in Nuclear Magnetic Resonance (NMR) medical imaging systems corrects for three-dimensional distortions arising from the apparatus and patient specific distortions using a phantom and a helmet, both of which have fiducial markers in a three-dimensional matrix. The positions of the phantom and helmet fiducial markers are automatically detected and compared in a computer system which uses image transform algorithms to correct for the various distortions.
    Type: Grant
    Filed: March 28, 1989
    Date of Patent: April 9, 1991
    Assignee: SAM Technology, Inc.
    Inventors: Douglas S. Greer, Alan S. Gevins
  • Patent number: 4736751
    Abstract: A method and system is provided for the analysis of a human subject's brain wave activity on a statistical basis using a digital computer. The location of portions of the subject's brain and the location of at least 32, and for example 265, external scalp sensors are digitally recorded and stored in computer memory. The subject receives a set of stimuli which evoke brain waves (evoked potential EP or evoked magnetic fields EF) which, along with the location data, are statistically analyzed to indicate the brain sites giving rise to the activity. The brain site activity, and the time interrelationships of brain waves as they progress between brain sites, are displayed on a three-dimensional model or other three-dimensional perspective display.
    Type: Grant
    Filed: December 16, 1986
    Date of Patent: April 12, 1988
    Assignee: EEG Systems Laboratory
    Inventors: Alan S. Gevins, Nelson H. Morgan, Douglas S. Greer
  • Patent number: 4345244
    Abstract: This disclosure relates to a video output circuit for high resolution character generation in a digital display unit. This output circuitry includes both character generation circuits and logic circuits, the latter of which fills in information bit areas adjacent to character bit areas which form a diagonal so as thereby to round out the character being displayed. In addition, the circuitry is adapted to change the position of such characters on the display screen so as to provide superscripts and subscripts as well as provide characters which are higher and wider than the normal character display. In order to minimize time lags in the generation display of such characters, the output circuitry is provided with a series of registers so that the character generation can be received in a sequential or pipelined manner.
    Type: Grant
    Filed: August 15, 1980
    Date of Patent: August 17, 1982
    Assignee: Burroughs Corporation
    Inventors: Douglas S. Greer, Paul Grunewald