Patents by Inventor Douglas Sim Dietrich, Jr.

Douglas Sim Dietrich, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230140250
    Abstract: A system includes a video source device connected to a video destination device via a network. The video source device includes a network interface and an encoder coupled to the network interface. The encoder is configured to encode a first stream of rendered video frames having a first frame rate to generate a second stream of encoded video frames for transmission over the network via the network interface, wherein the second stream has a second frame rate greater than the first frame rate. As part of this encoding process, the encoder is configured to selectively encode multiple instances of at least one video frame of the first stream for inclusion in the second stream to compensate for the difference between the first frame rate and the second frame rate.
    Type: Application
    Filed: October 10, 2019
    Publication date: May 4, 2023
    Inventors: Douglas Sim Dietrich, JR., Robert McCool, Jean-François Roy, Michael S. Green, Gurudas Somadder
  • Publication number: 20220184492
    Abstract: A server executing an application generates a frame token for a frame that is rendered for the application. One or more first metric messages are provided to the application in response to at least one first operation performed by the server on the frame. The first metric messages include the frame token and information indicating timing of the at least one first operation. The encoded information representing the frame token and the frame is transmitted from the server towards a client. One or more second metric messages are provided to the application in response to one or more second operations performed by the client on the frame. The one or more second metric messages include the frame token and information indicating timing of the second operations. A state of the application is modified based on the first and second metric messages.
    Type: Application
    Filed: March 18, 2020
    Publication date: June 16, 2022
    Inventors: Laurence HARRISON, Douglas Sim DIETRICH, Jr., Katherine WU, Richard O'GRADY
  • Publication number: 20220182682
    Abstract: A game streaming system encodes a raw frame to generate an encoded frame for a game stream including a plurality of frames for display. The system identifies a first encoding artifact based on a first difference between the encoded frame and the raw frame, and applies an overlay to the encoded frame. The overlay includes a first visual indicator indicating the first encoding artifact.
    Type: Application
    Filed: March 17, 2020
    Publication date: June 9, 2022
    Inventors: Erik F. NELSON, Douglas Sim Dietrich, Jr.
  • Patent number: 10099129
    Abstract: One or more hardware components identify a bottleneck stage within a processor pipeline that processes frames of a video stream. The bottleneck stage has a first clock. An upstream stage receives a feedback signal from the bottleneck stage. The upstream stage has a second clock and the feedback signal includes information as to time required by the bottleneck stage to operate on data and information as to time the data spent queued. The upstream stage adjusts the speed at which the upstream stage operates and queues data to approximate the speed at which the bottleneck stage is operating and queuing data.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: October 16, 2018
    Assignee: Sony Interactive Entertainment America LLC
    Inventors: Douglas Sim Dietrich, Jr., Nico Benitez, Timothy Cotter
  • Publication number: 20170007923
    Abstract: One or more hardware components identify a bottleneck stage within a processor pipeline that processes frames of a video stream. The bottleneck stage has a first clock. An upstream stage receives a feedback signal from the bottleneck stage. The upstream stage has a second clock and the feedback signal includes information as to time required by the bottleneck stage to operate on data and information as to time the data spent queued. The upstream stage adjusts the speed at which the upstream stage operates and queues data to approximate the speed at which the bottleneck stage is operating and queuing data.
    Type: Application
    Filed: September 19, 2016
    Publication date: January 12, 2017
    Inventors: Douglas Sim Dietrich, JR., Nico Benitez, Timothy Cotter
  • Patent number: 9446305
    Abstract: A system and method for efficiently processing a video stream using limited hardware and/or software resources. For example, one embodiment of a computer-implemented method for efficiently processing a video stream with a processor pipeline having a plurality of pipeline stages, comprises: identifying a bottleneck stage within the processor pipeline the bottleneck stage processing frames of the video stream; receiving a feedback signal from the bottleneck stage at one or more upstream stages, the feedback signal providing an indication of the speed at which the bottleneck stage is processing the frames of the video stream; and responsively adjusting the speed at which the one or more upstream stages are processing frames of the video stream to approximate the speed at which the bottleneck stage is processing the frames of the video stream.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: September 20, 2016
    Assignee: Sony Interactive Entertainment America LLC
    Inventors: Douglas Sim Dietrich, Jr., Nico Benitez, Timothy Cotter
  • Patent number: 8961316
    Abstract: A game server comprising a central processing unit to process video game program code and a graphics processing unit (GPU) to process graphics commands; back buffers to store video frames in response to the execution of the graphics commands; a front buffer to receive a video frame for rendering on a display after the video frame has been completed in one of the one or more back buffers, the front buffer outputting the video frame for display one scan line at a time at a designated scan out frequency, a subset of scan lines stored in the front buffer being associated with a VBI; a frame processing module to increase the number of scan lines to increase the likelihood that a new frame will be completed in a back buffer and ready for transfer to the front buffer at a time during the VBI.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: February 24, 2015
    Assignee: OL2, Inc.
    Inventors: Douglas Sim Dietrich, Jr., Nico Benitez, Timothy Cotter
  • Patent number: 8851999
    Abstract: A system for hosting video games comprising: a game server comprising a central processing unit to process video game program code and a graphics processing unit (GPU) to process graphics commands; one or more back buffers to store video frames in response to the execution of the graphics commands; a front buffer to receive a video frame for rendering on a display and outputting the video frame for display one scan line at a time at a designated scan out frequency, a subset of scan lines stored in the front buffer being associated with a vertical blanking interval (VBI); a frame processing module to increase the number of scan lines associated with the VBI to increase the likelihood that a new frame will be completed in a back buffer and ready for transfer to the front buffer at a time during the VBI.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: October 7, 2014
    Assignee: OL2, Inc.
    Inventors: Douglas Sim Dietrich, Jr., Nico Benitez, Timothy Cotter
  • Patent number: 8845434
    Abstract: A system comprises: an application/game server comprising a central processing unit to process application/video game program code and a graphics processing unit (GPU) to process graphics commands and generate a series of video frames for the application/video game; one or more back buffers to store video frames as the video frames are being created in response to the execution of the graphics commands; a front buffer to receive a video frame for rendering on a display after the video frame has been completed in one of the one or more back buffers, the front buffer outputting the video frame for display one scan line at a time at a designated scan out frequency, a subset of scan lines stored in the front buffer being associated with a vertical blanking interval (VBI); and a frame processing module.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: September 30, 2014
    Assignee: OL2, Inc.
    Inventors: Douglas Sim Dietrich, Jr., Nico Benitez, Timothy Cotter
  • Patent number: 8840477
    Abstract: An application/game server comprising a central processing unit to process application/video game program code and a graphics processing unit (GPU) to process graphics commands and generate a series of video frames for the application/video game; one or more back buffers to store video frames as the video frames are being created in response to the execution of the graphics commands; a front buffer-outputting the video frame for display one scan line at a time at a designated scan out frequency, a subset of scan lines stored in the front buffer being associated with a vertical blanking interval (VBI); and a frame processing module to begin copying a newly completed frame from the back buffer to the front buffer before the video data for a prior video frame stored in the front buffer has not been fully scanned out.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: September 23, 2014
    Assignee: OL2, Inc.
    Inventors: Douglas Sim Dietrich, Jr., Nico Benitez, Timothy Cotter
  • Publication number: 20120299940
    Abstract: A system and method for efficiently processing a video stream using limited hardware and/or software resources. For example, one embodiment of a computer-implemented method for efficiently processing a video stream with a processor pipeline having a plurality of pipeline stages, comprises: identifying a bottleneck stage within the processor pipeline the bottleneck stage processing frames of the video stream; receiving a feedback signal from the bottleneck stage at one or more upstream stages, the feedback signal providing an indication of the speed at which the bottleneck stage is processing the frames of the video stream; and responsively adjusting the speed at which the one or more upstream stages are processing frames of the video stream to approximate the speed at which the bottleneck stage is processing the frames of the video stream.
    Type: Application
    Filed: March 26, 2012
    Publication date: November 29, 2012
    Inventors: Douglas Sim Dietrich, JR., Nico Benitez, Timothy Cotter
  • Publication number: 20120115601
    Abstract: A system for hosting video games comprising: a game server comprising a central processing unit to process video game program code and a graphics processing unit (GPU) to process graphics commands; one or more back buffers to store video frames in response to the execution of the graphics commands; a front buffer to receive a video frame for rendering on a display and outputting the video frame for display one scan line at a time at a designated scan out frequency, a subset of scan lines stored in the front buffer being associated with a vertical blanking interval (VBI); a frame processing module to increase the number of scan lines associated with the VBI to increase the likelihood that a new frame will be completed in a back buffer and ready for transfer to the front buffer at a time during the VBI.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 10, 2012
    Inventors: Douglas Sim Dietrich, JR., Nico Benitez, Timothy Cotter
  • Publication number: 20120115600
    Abstract: A game server comprising a central processing unit to process video game program code and a graphics processing unit (GPU) to process graphics commands; back buffers to store video frames in response to the execution of the graphics commands; a front buffer to receive a video frame for rendering on a display after the video frame has been completed in one of the one or more back buffers, the front buffer outputting the video frame for display one scan line at a time at a designated scan out frequency, a subset of scan lines stored in the front buffer being associated with a VBI; a frame processing module to increase the number of scan lines to increase the likelihood that a new frame will be completed in a back buffer and ready for transfer to the front buffer at a time during the VBI.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 10, 2012
    Inventors: Douglas Sim Dietrich, JR., Nico Benitez, Timothy Cotter
  • Publication number: 20120108331
    Abstract: A system comprises: an application/game server comprising a central processing unit to process application/video game program code and a graphics processing unit (GPU) to process graphics commands and generate a series of video frames for the application/video game; one or more back buffers to store video frames as the video frames are being created in response to the execution of the graphics commands; a front buffer to receive a video frame for rendering on a display after the video frame has been completed in one of the one or more back buffers, the front buffer outputting the video frame for display one scan line at a time at a designated scan out frequency, a subset of scan lines stored in the front buffer being associated with a vertical blanking interval (VBI); and a frame processing module.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 3, 2012
    Inventors: Douglas Sim DIETRICH, JR., Nico Benitez, Timothy Cotter
  • Publication number: 20120108330
    Abstract: An application/game server comprising a central processing unit to process application/video game program code and a graphics processing unit (GPU) to process graphics commands and generate a series of video frames for the application/video game; one or more back buffers to store video frames as the video frames are being created in response to the execution of the graphics commands; a front buffer-outputting the video frame for display one scan line at a time at a designated scan out frequency, a subset of scan lines stored in the front buffer being associated with a vertical blanking interval (VBI); and a frame processing module to begin copying a newly completed frame from the back buffer to the front buffer before the video data for a prior video frame stored in the front buffer has not been fully scanned out.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 3, 2012
    Inventors: Douglas Sim Dietrich, JR., Nico Benitez, Timothy Cotter
  • Patent number: 8106904
    Abstract: A method and computer program product are provided for generating a shader program. Included is a file associated with a graphics effect. In use, a shader program is generated based on processing of the file to apply the graphics effect to an object.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: January 31, 2012
    Assignee: NVIDIA Corporation
    Inventors: Douglas Sim Dietrich, Jr., Ashutosh G. Rege, Christopher T. Maughan
  • Patent number: 7573485
    Abstract: A graphics system has a mode of operation in which real samples and virtual samples are generated for anti-aliasing pixels. Each virtual sample identifies a set of real samples associated with a common primitive that covers a virtual sample location within a pixel. The virtual samples provide additional coverage information that may be used to adjust the weights of real samples.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: August 11, 2009
    Assignee: NVIDIA Corporation
    Inventors: Gary C. King, Douglas Sim Dietrich, Jr., Michael J. M. Toksvig, Steven E. Molnar, Edward A. Hutchins
  • Patent number: 7468726
    Abstract: A graphics processor performs culling of invisible primitives in a vertex processing unit that includes a geometry shader or other processing engine that performs per-primitive operations. Primitives can be culled after clip space coordinates for the vertices have been computed and in some instances before at least one other vertex attribute has been computed. To the extent that this early culling reduces the number of vertices for which the full set of attributes is computed or reduces the number of primitives or vertices delivered to downstream units, throughput of the processor is increased.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: December 23, 2008
    Assignee: Nvidia Corporation
    Inventors: Matthias M. Wloka, Douglas Sim Dietrich, Jr.
  • Patent number: 7333119
    Abstract: A graphics system has a mode of operation in which real samples and virtual samples are generated for anti-aliasing pixels. Each virtual sample identifies a set of real samples associated with a common primitive that covers a virtual sample location within a pixel. The virtual samples provide additional coverage information that may be used to adjust the weights of real samples.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: February 19, 2008
    Assignee: Nvidia Corporation
    Inventors: Gary C. King, Douglas Sim Dietrich, Jr., Michael J. M. Toksvig, Steven E. Molnar, Edward A. Hutchins
  • Patent number: 7009605
    Abstract: A method and computer program product are provided for generating a shader program. Initially, a file associated with a graphics effect is a selected. Such file is then read and processed. A shader program is subsequently generated based on the processing of the file to apply the graphics effect to an object.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: March 7, 2006
    Assignee: NVIDIA Corporation
    Inventors: Douglas Sim Dietrich, Jr., Ashutosh G. Rege, Christopher T. Maughan, Jerome F. Duluk, Jr.