Abstract: An electronic device comprises one or more functional units, each functional unit being clocked by a respective clock signal. The electronic device further comprises a monitoring unit for providing a real-time estimate of an electrical current consumed by the functional units. The monitoring unit provides the real-time estimate on the basis of characteristic signals. The characteristic signals may comprise one or more of said clock signals, or one or more clock generating signals used to generate said clock signals. The electronic device may further comprise a power regulator responsive to the real-time estimate. A method of estimating in real-time an electrical current consumed by one or more functional units is also described.

Abstract: Embodiments of the present invention provide a voltage level shifter used to translate a binary input signal representing a binary sequence to a binary output signal representing the same binary sequence. The input signal is provided by an input voltage varying between a first input voltage level and a second input voltage level. The output signal is provided by an output voltage varying between a first output voltage level and a second output voltage level. The output signal has a delay relative to the input signal, and the voltage level shifter has a leakage current. The voltage level shifter has a first operating mode and a second operating mode. In the second operating mode, the delay is shorter while the leakage current is higher than in the first operating mode.

Abstract: An integrated circuit, comprises a power supply node being connectable to a voltage supply (Vdd); a ground node connectable to ground (GND); and an electrostatic discharge protection structure for diverting an electrostatic discharge away from protected parts of the integrated circuit. A gated domain is present which is supply gated and/or ground gated with respect to the power supply node and/or the ground node, as well as a gating switch for gating the gated domain relative to the power supply node and/or the ground node. The gating switch enables in a connecting state, and in a disconnecting state inhibits, an electrical connection between the gated domain and at least one of: the power supply node and the ground node. The integrated circuit includes ESD gating control circuitry for controlling in case of an electrostatic discharge event the gated domain to be electrically connected to the power supply node and/or the ground node.

Abstract: An electronic device comprises one or more functional units, each functional unit being clocked by a respective clock signal. The electronic device further comprises a monitoring unit for providing a real-time estimate of an electrical current consumed by the functional units. The monitoring unit provides the real-time estimate on the basis of characteristic signals. The characteristic signals may comprise one or more of said clock signals, or one or more clock generating signals used to generate said clock signals. The electronic device may further comprise a power regulator responsive to the real-time estimate. A method of estimating in real-time an electrical current consumed by one or more functional units is also described.

Abstract: There is provided a semiconductor Integrated Circuit device having forward well biasing, in which at least one protection device is connected between a supply voltage and a forward well bias voltage.

Abstract: Embodiments of the present invention provide a voltage level shifter used to translate a binary input signal representing a binary sequence to a binary output signal representing the same binary sequence. The input signal is provided by an input voltage varying between a first input voltage level and a second input voltage level. The output signal is provided by an output voltage varying between a first output voltage level and a second output voltage level. The output signal has a delay relative to the input signal, and the voltage level shifter has a leakage current. The voltage level shifter has a first operating mode and a second operating mode. In the second operating mode, the delay is shorter while the leakage current is higher than in the first operating mode.

Abstract: An integrated circuit, comprises a power supply node being connectable to a voltage supply (Vdd); a ground node connectable to ground (GND); and an electrostatic discharge protection structure for diverting an electrostatic discharge away from protected parts of the integrated circuit. A gated domain is present which is supply gated and/or ground gated with respect to the power supply node and/or the ground node, as well as a gating switch for gating the gated domain relative to the power supply node and/or the ground node. The gating switch enables in a connecting state, and in a disconnecting state inhibits, an electrical connection between the gated domain and at least one of: the power supply node and the ground node. The integrated circuit includes ESD gating control circuitry for controlling in case of an electrostatic discharge event the gated domain to be electrically connected to the power supply node and/or the ground node.

Abstract: A system that has low power recovery capabilities, the system includes: a switch that is adapted to provide a gated power supply to a power gated circuit in response to a control current; and a control signal generator adapted to control an intensity of the control current in response to a reception of a low power period end indicator, a value of the continuous supply voltage at a port of the control signal generator, a value of the gated supply voltage and an output signal of a high switching point buffer that is inputted by the gated supply voltage.

Abstract: A system that has low power recovery capabilities, the system includes: a switch that is adapted to provide a gated power supply to a power gated circuit in response to a control current; and a control signal generator adapted to control an intensity of the control current in response to a reception of a low power period end indicator, a value of the continuous supply voltage at a port of the control signal generator, a value of the gated supply voltage and an output signal of a high switching point buffer that is inputted by the gated supply voltage.