Patents by Inventor Dragan Milicev

Dragan Milicev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electronic apparatus having parallel memory banks
    Patent number: 10001971
    Abstract: An electronic apparatus may be provided that includes a processor to perform operations, and a memory subsystem including a plurality of parallel memory banks to store a two-dimensional (2D) array of data using a shifted scheme. Each memory bank may include at least two elements per bank word.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: June 19, 2018
    Assignee: Intel Corporation
    Inventors: Radomir Jakovljevic, Aleksandar Beric, Edwin Van Dalen, Dragan Milicev
  • ELECTRONIC APPARATUS HAVING PARALLEL MEMORY BANKS
    Publication number: 20160378650
    Abstract: An electronic apparatus may be provided that includes a processor to perform operations, and a memory subsystem including a plurality of parallel memory banks to store a two-dimensional (2D) array of data using a shifted scheme. Each memory bank may include at least two elements per bank word.
    Type: Application
    Filed: March 21, 2016
    Publication date: December 29, 2016
    Inventors: Radomir JAKOVLJEVIC, Aleksandar BERIC, Edwin VAN DALEN, Dragan MILICEV
  • Intelligent parametric scratchap memory architecture
    Patent number: 9329834
    Abstract: An electronic apparatus may be provided that includes a processor to perform operations, and a memory subsystem including a plurality of parallel memory banks to store a two-dimensional (2D) array of data using a shifted scheme. Each memory bank may include at least two elements per bank word.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: May 3, 2016
    Assignee: Intel Corporation
    Inventors: Radomir Jakovljevic, Aleksandar Beric, Edwin Van Dalen, Dragan Milicev
  • INTELLIGENT PARAMETRIC SCRATCHAP MEMORY ARCHITECTURE
    Publication number: 20140149657
    Abstract: An electronic apparatus may be provided that includes a processor to perform operations, and a memory subsystem including a plurality of parallel memory banks to store a two-dimensional (2D) array of data using a shifted scheme. Each memory bank may include at least two elements per bank word.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 29, 2014
    Inventors: Radomir Jakovljevic, Aleksandar Beric, Edwin Van Dalen, Dragan Milicev